Alignment pattern, semiconductor structure with alignment pattern and manufacturing method of semiconductor structure
A technology for aligning patterns and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, and photoengraving processes of patterned surfaces. It can solve problems such as poor quasi-quality and achieve area reduction, area reduction, and elimination The effect of the etch loading effect
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[0027] It can be seen from the background art that the accuracy of alignment using existing alignment patterns needs to be improved.
[0028] Figure 1 to Figure 4 It is a structural schematic diagram corresponding to each step of a method for forming a semiconductor structure with aligned patterns.
[0029] refer to figure 1 , providing a substrate comprising a first region i and a second region ii located between adjacent first regions i, the substrate comprising a substrate 10 and a polysilicon layer 20 located on the surface of the substrate 10, the surface of the substrate of the first region i is formed with discrete The first dielectric layer 21 has a photoresist layer 22 on the top surface of the first dielectric layer 21; a second dielectric layer 23 is also formed on the surface of the base, and the second dielectric layer 23 also covers the top and sidewalls of the photoresist layer 22. The thickness of the second dielectric layer 23 is smaller than that of the fi...
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