AI server computing unit architecture and implementation method

Abstract

The invention provides an AI server computing unit architecture and an implementation method. The architecture comprises a power consumption acquisition module, a control module, a first PCIe Switch chip and a second PCIe Switch chip, the control module is in communication connection with the first PCIe Switch chip and the second PCIe Switch chip respectively; the power consumption acquisition module is used for acquiring power consumption data of the CPU and the GPU; the control module is used for acquiring power consumption data of the CPU and the GPU from the power consumption acquisition module, analyzing and processing the power consumption data and sending a control instruction packet to the PCIe Switch chip according to a processing result of the power consumption data; and on-off setting and uplink and downlink attribute setting of a PCIe Switch chip port are controlled to realize adjustment of the number of GPUs participating in calculation and adjustment of the interconnection relationship between the GPUs and the CPU through the PCIe Switch chip.

Description

technical field [0001] The present invention relates to the technical field of server computing unit architecture design, in particular to an AI server computing unit architecture and an implementation method. Background technique [0002] In order to meet the collection and arrangement of various data in the fields of big data, cloud computing, and artificial intelligence, AI servers using various heterogeneous forms have been widely used. A large number of applications of computing units satisfy the server's ability to perform intensive data operations. [0003] CPU+GPU is a combination of computing units commonly used in AI servers. NVIDIA has introduced three basic PCIe topologies for the interconnection of CPU+GPU - Balance Mode, Common Mode and Cascade Mode. In most application scenarios, the computing capabilities of the balanced mode and the general mode are similar, and the topology model cannot be better selected based on the application scenario alone; the P2P p...

AI Technical Summary

Problems solved by technology

[0006] A single architecture design leads to poor flexibility in the applicable application scenarios of the server; the complex line design of the computing unit interconnection topology switching module affects the quality of high-speed signals; the few types of topology switching lead to large switching limitations, so that the overall switching of the interconnection topology is very important for the individual computing units participating in the calculation The problem that the number cannot be adjusted flexibly, the present invention provides an AI server computing unit architecture and implementation method

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