Process method of shield gate trench type MOSFET

Abstract

The invention discloses a process method of a shield gate trench type MOSFET. The method comprises the following steps 1, depositing a silicon oxide layer on a semiconductor substrate, and sequentially depositing a silicon nitride layer and a silicon oxide layer to form an ONO layer, and etching the ONO layer; 2, taking the ONO layer as a hard mask, and carrying out the downward etching of the semiconductor substrate, and forming a trench; 3, carrying out back etching on the ONO layer; 4, carrying out chamfer etching on the bottom of the formed groove; 5, depositing and forming a dielectric layer in the groove; step 6, depositing and filling a polycrystalline silicon layer in the trench; and 7, performing back etching on the deposited polycrystalline silicon layer. According to the processmethod disclosed by the invention, the back etching process of the ONO layer of the hard mask layer is added before a groove chamfer etching process, so that the morphology of the top of the groove is improved, and the process tolerance of polycrystalline silicon filling is increased; the groove etching angle is allowed to reach 88 degrees or above, after the groove etching angle is increased, the size of each device unit can be reduced, and the performance of the device can be enhanced.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a shielding gate trench type MOSFET process method. Background technique [0002] Trench-type double-layer gate MOS, as a power device, has the characteristics of high breakdown voltage, low on-resistance, and fast switching speed. The structure of the shielded gate trench MOSFET is divided into upper and lower parts. The lower half of the trench is filled with polysilicon as the source, and the polysilicon in the upper half of the trench is the gate. separated by an oxide layer. Its characteristic is that the polysilicon filled in the source trench only accounts for about half of the internal space of the trench, so that the source contact hole needs to be made deeper to contact the polysilicon filled in the lower part of the trench. The process method of this device is to first deposit a layer of oxide layer on the silicon substrate as a hard mask...

AI Technical Summary

Problems solved by technology

[0005] 2. The 87.5° angle of the trench limits the further reduction of the occupied area of ​​the entire device, which affects the integration level and hinders the further improvement of device performance

[0006] 3. When there is a process requirement that the groove angle needs to be greater than 88°, such as Figure 4 As shown in the dashed box, there will be gaps in the first layer of polysilicon deposition (that is, voids are formed in the polysilicon filling), which will affect the etching and the morphology of the subsequent IPO (Inter-Poly Oxide, inter-polysilicon oxide film)

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