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A buffer management method for nand flash memory

A management method and buffer technology, applied in the cache field of computer storage devices, can solve problems such as asymmetric read and write costs of NAND flash memory, and achieve the effects of avoiding performance jitter problems, high hit rate, and reducing search overhead.

Active Publication Date: 2021-02-12
XI AN JIAOTONG UNIV
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AI Technical Summary

Problems solved by technology

Different from traditional disks, NAND flash memory is a storage medium that can be written once and erased in batches. NAND flash memory has three basic operations, namely read, write and erase operations, where read and write operations are performed in units of data pages Operation, the erase operation is performed in units of blocks, and the erase operation must be performed before writing, which leads to the asymmetry of the read and write cost of NAND flash memory

Method used

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  • A buffer management method for nand flash memory
  • A buffer management method for nand flash memory
  • A buffer management method for nand flash memory

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Experimental program
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Embodiment Construction

[0042] see figure 1 , a buffer management method for NAND flash memory, the specific steps are as follows:

[0043] S1, the system counter is set, and the system counter value is used as the access time stamp value of the accessed data page in the buffer;

[0044] In terms of overall logic, the organizational structure of the buffer is regarded as an LRU linked list organized according to the logical number of the data page. The data page at the MRU end of the logical LRU linked list is the data page currently being accessed by the system, and its access time stamp value is the largest. The value is equal to the current system counter value, and from the MRU end to the LRU end, the data page access time stamp value decreases in turn.

[0045] On this basis, the concept of time window is proposed, and a time window size is selected at the MRU end of the logical LRU linked list to identify the number of data pages that have been accessed in the most recent period. The time wind...

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Abstract

The invention discloses a buffer management method for NAND flash memory, which divides the database buffer into a cold and clean linked list, a cold and dirty linked list and a mixed linked list, and the cold and clean linked list, the cold and dirty linked list and the mixed linked list are numbered according to the overall access sequence; in the whole Logically, the buffer is regarded as a singly linked list organized in order of access, and the concept of time window is proposed to cover the data pages accessed in the most recent period; Priority order, check whether the data page pointed to by the tail of the linked list is within the time window; if it is, then find the next linked list; if not, replace it directly. The present invention obtains a higher hit rate while reducing the number of flash write operations, thereby obtaining greater cache benefits and improving the overall performance of the storage system.

Description

technical field [0001] The invention belongs to the technical field of caching of computer storage devices, and in particular relates to a buffer management method for NAND flash memory. Background technique [0002] The buffer replacement algorithm is used to optimize IO operations and reduce the number of disk accesses, and is widely used in operating systems, data blocks, and network servers. The cache module of the computer storage device can optimize the I / O sequence and reduce the number of accesses to the storage device. A good buffer management method can obtain a higher hit rate and improve the performance of the storage system as a whole. [0003] Flash memory is a non-volatile storage device. Solid-state drives (SSDs) are widely used in mobile devices and personal computers due to their small size, light weight, impact resistance, high speed, and high reliability. Different from traditional disks, NAND flash memory is a storage medium that can be written once and...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/0638G06F3/0656G06F3/0679
Inventor 伍卫国宫继伟解超聂世强张驰张晨
Owner XI AN JIAOTONG UNIV
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