Retransmission self-trapping immediate processing method in superscalar microprocessor

Abstract

The invention relates to a retransmission self-trapping immediate processing method in a superscalar microprocessor. The method comprises the following steps of after arbitration in a memory access component, reporting the retransmission self-trapping to a reordering buffer and an integer execution component; using the reordering buffer to register the received retransmission self-trapping information into a reordering buffer entry after carrying out fixed registration for two beats; after the retransmission self-trapping information received by the integer execution part is fixedly registeredfor two beats, arbitrating and sending the broadcast emptying assembly line information; using the reordering buffer to send a retransmission self-trapping request and an instruction fetching addressto the value fetching component at the next beat of receiving the retransmission self-trapping, and restarting the assembly line platform; and after the retransmission self-trapping in the reorderingbuffer entry reaches the header, deleting the retransmission self-trapping from the entry, and recovering the transmission of the retransmission self-trapping instruction. According to the method, the processing time of retransmission self-trapping is shortened, so that the instruction pipeline can be recovered and restarted more quickly.

Description

technical field [0001] The invention relates to the technical field of superscalar microprocessors, in particular to a retransmission self-trap immediate processing method in a superscalar microprocessor. Background technique [0002] Current superscalar microprocessors support out-of-order launch, out-of-order execution, speculative execution, and sequential submission. The instruction pipeline usually includes fetching (Fetch), decoding (Decode), register renaming (Map), and issuing (Issue) , execution (Execute), submission (Retire) and several other basic pipeline platforms. It is a basic design requirement that instructions are executed and submitted in program order. Therefore, current superscalar microprocessors are equipped with a reorder buffer (ROB) for all instructions. This buffer is a circular queue managed by head and tail pointers. , Tail pointer are used to control the exit and entry of the instruction respectively. The head pointer always points to the next...

AI Technical Summary

Problems solved by technology

Instructions that generate reissue traps wait for the previous instructions to exit normally, and the restart of the pipeline has a large runtime overhead

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