Wafer surface charge eliminating device and method

Abstract

The invention discloses a wafer surface charge eliminating device. A shell of the wafer surface charge eliminating device forms a closed cavity; a partition plate is fixed in the middle of the shell,and isolates the closed cavity formed by the shell into a closed upper chamber and a closed lower chamber when the partition plate is unfolded; the side wall of the shell at the lower chamber is provided with a wafer placement door that can be opened and closed; an upper pole plate is disposed in the upper chamber and parallel to the partition plate; the shell is an insulating material; the upperpole plate and the partition plate are both conductive materials; the upper pole plate is connected to an upper electrode; the partition plate is connected to a lower electrode; a charge measuring device and a worktable capable of lifting and rotating are placed in the lower chamber; and the side wall of the upper chamber is provided with a ventilation interface. The invention also discloses a wafer surface charge eliminating method of the wafer surface charge eliminating device. The invention can eliminate the interference of wafer surface charges on manufacturing and measurement processes, reduce process defects, and improve the measurement pattern accuracy.

Description

technical field [0001] The invention relates to charge processing technology for integrated circuit manufacturing, in particular to a wafer surface charge elimination device and method. Background technique [0002] With the continuous shrinking of integrated circuit manufacturing process nodes, the lithographic feature size (CD, Critical dimension) is also continuously reduced. The feature size is an important dimension to measure the level of integrated circuit design and production. Its accuracy directly affects the electrical properties of semiconductor devices. performance. [0003] The surface of the wafer after the integrated circuit manufacturing process always has some positive and negative charges. For example, after the photolithography and dry etching process, there is positive charge accumulation on the wafer surface, and the wafer has been scanned by CD SEM (feature size scanning electron microscope) for many times. There will be negative charge accumulation a...

AI Technical Summary

Problems solved by technology

The accumulation of charge will have a great impact on the measurement accuracy. If the accumulated charge is positive, the electrons in the electron beam emitted by the CD SEM will be neutralized, so that the excited secondary electrons will be reduced, and the generated image signal will also be weakened; if Negative charges are accumulated on the surface of the wafer. Due to the repulsion of electrons on the surface of the pattern, the measured value will become larger and larger, and the true value of the feature size cannot be obtained.

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