Deep neural network hardware accelerator based on power exponent quantization

Abstract

The invention discloses a deep neural network hardware accelerator based on power exponent quantization, relates to a processor structure for deep neural network convolution calculation hardware acceleration, and belongs to the technical field of calculation, calculation and counting. The hardware accelerator comprising: an AXI-4 bus interface, an input cache region, an output cache region, a weight cache region, a weight index cache region, an encoding module, a configurable state controller module and a PE array. The input cache region and the output cache region are designed into a row cache structure; the encoder encodes the weights according to an ordered quantization set that stores absolute values of all quantized weights. when the accelerator performs calculation, the PE unit readsdata from the input cache region and the weight index cache region to perform shift calculation, and sends a calculation result to the output cache region. According to the method, floating point multiplication is replaced by shift operation, so that the requirements on computing resources, storage resources and communication bandwidth are reduced, and the computing efficiency of the acceleratoris further improved.

Description

technical field [0001] The invention discloses a deep neural network hardware accelerator based on power exponent quantization, relates to a processor structure for hardware acceleration of deep neural network convolution calculation, and belongs to the technical field of calculation, calculation and counting. Background technique [0002] In recent years, artificial intelligence has penetrated into all areas of life and has had a major impact on the world's economic and social activities. Deep learning is a hot field in machine learning research and is widely used in mainstream artificial intelligence algorithms. As a technology of deep learning, Deep Convolutional Neural Network (DCNN) is currently widely used in many Artificial Intelligence (AI) applications, deep convolutional neural networks have achieved some remarkable results in the technical fields of computer vision, speech recognition and robotics, especially in the field of image recognition. [0003] Deep convo...

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Problems solved by technology

[0004] The purpose of the invention of the present invention is to aim at the deficiency of above-mentioned background technology, provide a kind of deep neural network hardware accelerator based on exponentiation exponent quantization, by designing the hardware accelerator that realizes shift operation based on the result of exponent exponent quantization to neural network parameter, avoid Using complex multiplication circuits to realize floating-point multiplication operations reduces processor power consumption and chip area, and solves the technical problems of complex circuits, large storage space and high power consumption in existing processors that implement deep neural network convolution operations

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