An Overlay Error Extraction Method Based on Optical Diffraction

Abstract

The invention belongs to the field of photolithography, and discloses an overlay error extraction method based on optical diffraction, including: (1) determining the overlay mark structure and material optical constants; (2) establishing an overlay mark forward optical characteristic model; 3) Generating a training set based on the optical characteristic model; (4) Determining the neural network structure; (5) Training the neural network; (6) Extracting overlay errors. Compared with the existing overlay error extraction method, the method provided by the present invention does not depend on optical resolution and empirical linear relationship, can realize overlay error measurement in a single direction based on one unit, has smaller overlay mark area, and can The overlay error is extracted from more complex nonlinear overlay optical characterization quantities, and the extraction process is fast, accurate and robust.

Description

technical field [0001] The invention belongs to the field of photolithography, and more specifically relates to an overlay error extraction method based on optical diffraction. Background technique [0002] With the rapid development of the integrated circuit (Integrated Circuit, IC) process, the critical dimension (Critical Dimension, CD) has been reduced to the 7nm node. In the IC manufacturing process, the photolithography process is the most critical. The main performance indicators of the lithography process include overlay accuracy, substrate size, resolution, light source wavelength, etc. Wherein, the overlay accuracy refers to the alignment accuracy of the current photolithographic process layer pattern and the previous layer process layer pattern. Generally speaking, the allowable size of the overlay error is 1 / 3 to 1 / 5 of the critical dimension. Therefore, under the advanced IC manufacturing node, the rapid, accurate and stable measurement and evaluation of the o...

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Problems solved by technology

Chinese patent CN103472004B pointed out that the mDBO method needs to solve complex partial differential equations in real time to construct the optical model of overlay marks, so it is difficult to meet the time requirements for in-situ measurement of overlay errors

However, under the influence of complex IC manufacturing process, overlay marking is difficult to guarantee the ideal design shape and measurement conditions

In addition, other asymmetric factors of the overlay mark will cause the overlay characteristic curve to shift, that is, the calculation uses the ideal curve 201, but the actual curve 202 is shifted compared with the ideal curve 201, so that the accuracy of the overlay error extraction μ have a very negative impact on

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