Laminated silicon-doped tin oxide thin film transistor and preparation method thereof

A technology of thin film transistors and silicon doping, applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of unstable optical bias voltage and low mobility, achieve low annealing temperature, simple preparation process, good The effect of device performance

Active Publication Date: 2019-06-14
SOUTH CHINA UNIV OF TECH
View PDF2 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the traditional amorphous silicon thin film transistor is cheap to manufacture, its low mobility and unstable optical bias restrict its development.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Laminated silicon-doped tin oxide thin film transistor and preparation method thereof
  • Laminated silicon-doped tin oxide thin film transistor and preparation method thereof
  • Laminated silicon-doped tin oxide thin film transistor and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0038] A stacked silicon-doped tin oxide thin film transistor in this embodiment includes a substrate, a gate, a gate insulating layer, a first active layer, a second active layer, and source and drain electrodes stacked in sequence. Its layered structure diagram is shown in figure 1 shown. Its preparation method is as follows:

[0039] (1) At room temperature, an aluminum gate is prepared on a glass substrate by DC magnetron sputtering and patterned;

[0040] (2) On the gate, an aluminum oxide gate insulating layer is grown by an anodic oxidation method;

[0041] (3) On the gate insulating layer, utilize a mask plate to deposit a first layer of active layer with a thickness of 5 nm by radio frequency magnetron sputtering; the material of the first layer of active layer is 3% by mass of silicon Silicon-doped tin oxide;

[0042] (4) Annealing the prepared sample at 250°C on a hot stage;

[0043] (5) Utilize the same mask plate as step (3), on the first active layer, deposi...

Embodiment 2

[0047] A stacked silicon-doped tin oxide thin film transistor in this embodiment includes a substrate, a gate, a gate insulating layer, a first active layer, a second active layer, and source and drain electrodes stacked in sequence. Its layered structure diagram is shown in figure 1 shown. Its preparation method is as follows:

[0048] (1) At room temperature, an aluminum gate is prepared on a glass substrate by DC magnetron sputtering and patterned;

[0049] (2) On the gate, an aluminum oxide gate insulating layer is grown by an anodic oxidation method;

[0050] (3) On the gate insulating layer, utilize a mask plate to deposit a first layer of active layer with a thickness of 5 nm by radio frequency magnetron sputtering; the material of the first layer of active layer is 0% by mass of silicon tin oxide;

[0051] (4) Annealing the prepared sample at 250°C on a hot stage;

[0052] (5) Utilize the same mask plate as step (3), on the first active layer, deposit the second a...

Embodiment 3

[0056] A stacked silicon-doped tin oxide thin film transistor in this embodiment includes a substrate, a gate, a gate insulating layer, a first active layer, a second active layer, and source and drain electrodes stacked in sequence. Its layered structure diagram is shown in figure 1 shown. Its preparation method is as follows:

[0057] (1) At room temperature, an aluminum gate is prepared on a glass substrate by DC magnetron sputtering and patterned;

[0058] (2) On the gate, an aluminum oxide gate insulating layer is grown by an anodic oxidation method;

[0059] (3) On the gate insulating layer, utilize a mask plate to deposit a first layer of active layer with a thickness of 5 nm by radio frequency magnetron sputtering; the material of the first layer of active layer is 1% by mass of silicon Silicon-doped tin oxide;

[0060] (4) Annealing the prepared sample at 250°C on a hot stage;

[0061] (5) Utilize the same mask plate as step (3), on the first active layer, deposi...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention belongs to the technical field of thin film transistors, and discloses a laminated silicon-doped tin oxide thin film transistor and a preparation method thereof. The laminated silicon-doped tin oxide thin film transistor comprises a substrate, a gate, a gate insulating layer, a first layer of active layer, a second layer of active layer, and a source drain electrode that are stackedin sequence, wherein the first layer of active layer is silicon-doped tin oxide with 0-3 mass percent of silicon, and the second layer of active layer is silicon-doped tin oxide with 5-10 mass percentof silicon. A silicon-doped tin oxide semiconductor material serves as a material of the active layers, and tin oxide active layer materials doped with different contents of silicon are matched, so as to prepare a laminated active layer structure to control a carrier in a channel of a device, so that the device has good performance.

Description

technical field [0001] The invention belongs to the technical field of thin film transistors, in particular to a stacked silicon-doped tin oxide thin film transistor and a preparation method thereof. Background technique [0002] Thin film transistors are widely used in liquid crystal displays and organic light emitting diode displays to drive the arrangement of liquid crystal molecules, realize light transmittance changes and drive organic light emitting diodes to emit light. [0003] At present, flat-panel display technology is developing rapidly, and large-size, high-resolution, high-refresh rate displays have become the mainstream. It is very important to improve the performance of thin-film transistors and reduce production costs. Although the traditional amorphous silicon thin film transistor is cheap to manufacture, its low mobility and unstable light bias restrict its development. [0004] Due to the advantages of amorphous structure, high mobility, and low preparat...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L29/06H01L29/10H01L29/24H01L29/786H01L21/34
Inventor 宁洪龙刘贤哲姚日晖张旭袁炜健邓宇熹张啸尘邓培淼陈建秋彭俊彪
Owner SOUTH CHINA UNIV OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap