Delay circuit

A delay circuit and circuit technology, applied in electrical components, single output arrangement, pulse technology, etc., can solve problems such as delay time change, and achieve the effect of small delay time, easy adjustment, and low power consumption

Active Publication Date: 2019-03-08
HUNAN GOKE MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The problem to be solved by the present invention is to provide a delay circuit for the cha...

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Embodiment Construction

[0059] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings of the present application. Apparently, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0060] Such as figure 2 — Figure 8 As shown, the present invention provides a delay circuit, including a current source circuit 3 , a voltage adjustment circuit 2 , and a main delay circuit 1 .

[0061] In the present invention, part 1 of the main delay circuit is composed of a two-stage CMOS inverter and an RC delay unit, and the principle diagram of the scheme is as follows figure 1 . Since the delay of the inverter is greatly affected by the temperature and...

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Abstract

The invention provides a delay circuit. The delay circuit comprises a current source circuit, a voltage adjusting circuit and a main delay circuit, and the main delay circuit comprises k sub-delay circuits mutually connected in series, wherein k is a natural number; each sub-delay circuit comprises a first-level CMOS inverter and a second-level CMOS inverter mutually connected in series; and a substrate and a source electrode of a PMOS transistor of the first-level CMOS inverter and a substrate and a source electrode of a PMOS transistor of the second-level CMOS inverter are mutually connectedto a first circuit connection point, and the voltage and the temperature of the first circuit connection point are in linear negative correlation. According to the delay circuit, the delay time has asmall temperature drift, a power supply voltage is replaced by the voltage adjusting circuit to supply power to the delay circuit, a current source provides a current in positive correlation with thetemperature, the voltage adjusting circuit enables a bias voltage to be in a relatively stable level, and the influence of fluctuation of a power supply on the delay time is small.

Description

technical field [0001] The invention belongs to the field of electronic circuits and semiconductors, in particular to a delay circuit. Background technique [0002] Such as figure 1 As shown, the existing delay circuit composed of CMOS inverters generally consists of a first-stage CMOS inverter 11 and a second-stage CMOS inverter 12 . Both the first-stage CMOS inverter 11 and the second-stage CMOS inverter are composed of PMOS transistors and NMOS transistors. In each stage of CMOS inverters, the gate of the PMOS transistor is connected to the gate of the NMOS transistor and is connected to the input end of the CMOS inverter of the stage; the drain of the PMOS transistor is connected to the drain of the NMOS transistor. connected to and connected to the output terminal of the CMOS inverter of this stage; the substrate and source of the NMOS transistor NM1 are connected to each other and grounded. The substrates and sources of the PMOS transistors at all levels are connect...

Claims

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Application Information

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IPC IPC(8): H03K5/13
CPCH03K5/13H03K2005/00143
Inventor 朱明旺
Owner HUNAN GOKE MICROELECTRONICS
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