High-speed ARINC429 data processing method based on FPGA

Abstract

The invention discloses a high-speed ARINC429 data processing method based on FPGA. The method comprises steps that a CPU and FPGA coding and decoding unit and a transceiver driver unit are included,a channel of a transmission code, the rate and the transmission information are controlled by a CPU through a bus, the rate of receiving and decoding, odd-even check and LABEL number filtering are controlled, moreover, received data is extracted from the bus for analysis; encoding and decoding are performed by an FPGA encoding and decoding unit according to CPU setting, and LABEL hardware filtering is performed; a standard ARINC 429 signal is converted to a 3.3V TTL signal by the transceiver driver unit, and the 3.3V TTL signal is converted to the standard ARINC 429 signal. The method is advantaged in that CPU processing speed requirements are reduced, performance is improved by 1111 times, a system interface is simple and is convenient to control and use; a main body is implemented by theFPGA, configuration is flexible, and upgrade and expansion are convenient.

Description

technical field [0001] The invention relates to a high-speed ARINC429 data processing method based on FPGA. Background technique [0002] The full name of the ARINC429 specification is "Digital Information Transfer System" (Digital Information Transfer System, DITS), which is formulated by the Airline Electronic Engineering Commission (AEEC) and published by Aeronautical Radio Inc. (ARINC). A commercial aircraft onboard bus specification. The specification has rich data resources, high data accuracy, simple structure, stable performance, reliable transmission, and strong anti-interference ability. It is widely used in civil aviation and military avionics systems. [0003] Such as figure 1 Shown, in existing ARINC429 data processing realization method, mainly adopt CPU and 429 special-purpose agreement chip to form, specifically as follows: [0004] 1) CPU: responsible for the working mode control of the 429 special protocol chip, extracting and receiving data, data analys...

AI Technical Summary

Problems solved by technology

[0012] 1) Processing unnecessary data on the bus, resulting in waste of CPU processing resources;

[0013] 2) The response processing time of the CPU is relatively high (≤360us), when the CPU is relatively busy, it is easy to cause data loss;

[0014] 3) The typical configuration of the protocol chip is 2 channels for receiving and 1 channel for sending, which is not easy to expand

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