Semiconductor device and formation method thereof

Abstract

The invention provides a semiconductor device and a formation method thereof. The method includes providing a substrate; forming an interlayer dielectric layer on the substrate, the interlayer dielectric layer having an opening passing through the interlayer dielectric layer; forming a work function layer on the side wall and at the bottom of the opening; forming a first gate electrode layer located on the work function layer in the opening, the temperature of the technology used for forming the first gate electrode layer being a first temperature; and forming a second gate electrode layer located on the first gate electrode layer in the opening, the temperature of the technology used for forming the second gate electrode layer being a second temperature, and the first temperature being less than the second temperature. The electrical properties of a semiconductor device can be enhanced.

Description

Technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a method of forming the same. Background technique [0002] MOS transistors are one of the basic semiconductor devices that constitute integrated circuits. The MOS transistors include: P-type metal oxide semiconductor (PMOS) transistors and N-type metal oxide semiconductor (NMOS) transistors. [0003] In order to adjust the threshold voltage of the PMOS transistor and the NMOS transistor, a corresponding work function layer is formed on the surface of the gate dielectric layer of the PMOS transistor and the NMOS transistor. Among them, the work function layer of the PMOS transistor needs to have a higher work function, and the work function layer of the NMOS transistor needs to have a lower work function. In the PMOS transistor and the NMOS transistor, the material of the work function layer is different to meet the needs of respective work functio...

AI Technical Summary

Problems solved by technology

[0004] However, the electrical performance of MOS transistors formed in the prior art is poor

Images