Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

GaAs epitaxial film based on SOI substrate, preparation method and application

An epitaxial thin film and FD-SOI technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., to achieve the effects of reducing dislocation density, improving quality, and low energy consumption

Inactive Publication Date: 2018-09-21
BEIJING UNIV OF TECH
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

To further improve chip integration and operating speed, existing bulk silicon materials and processes are approaching their physical limits

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • GaAs epitaxial film based on SOI substrate, preparation method and application
  • GaAs epitaxial film based on SOI substrate, preparation method and application

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] An embodiment of the present invention provides a method for preparing a GaAs epitaxial thin film based on an SOI substrate, comprising the following steps:

[0037] S1. Select the FD-SOI substrate for RCA cleaning and place it in the reaction chamber of the UHV-CVD system to maintain a vacuum of 5×10 - 6 Pa, slowly heat the substrate to 900°C and keep it for 30min for pretreatment;

[0038] S2. Lower the temperature of the substrate to 750°C and inject Si 2 h 6 Growth of 100nm Si buffer layer;

[0039] S3. Lower the temperature of the substrate to 450°C, and at the same time introduce the source material Si 2 h 6 and GeH 4 , start Ge x Si (1-x) Gradient transition layer growth: grow Ge first 0.24 Si 0.76 50min, then stop feeding Si 2 h 6 , lower the temperature to 330°C and continue to grow the low-temperature Ge layer for 2 hours. After the growth of the low-temperature Ge layer is completed, the temperature is adjusted to 600°C. After growing the high-pu...

Embodiment 2

[0042] An embodiment of the present invention provides a method for preparing a GaAs epitaxial thin film based on an SOI substrate, comprising the following steps:

[0043] S1. Select the FD-SOI substrate for RCA cleaning and place it in the reaction chamber of the UHV-CVD system to maintain a vacuum of 4×10 - 6 Pa, slowly heat the substrate to 850°C and keep it for 30min for pretreatment;

[0044] S2. Lower the temperature of the substrate to 750°C and inject Si 2 h 6 Growth of 100nm Si buffer layer;

[0045] S3, using SiH based on UHV-CVD 4 / Si 2 h 6 , GeH 4 As a growth source, the gas pressure is 30mTorr, using Ge x Si (1-x) Gradual buffering of medium Ge composition, low dislocation density and good crystal quality Ge grown at a temperature of 400°C x Si (1-x) Gradient transition layer: first grow the first layer of Si with a thickness of 0.8 μm 0.1 Ge 0.9 , and by in-situ annealing at 660 °C for 15 min; subsequently growing a second layer of Si with a thickne...

Embodiment 3

[0048] An embodiment of the present invention provides a method for preparing a GaAs epitaxial thin film based on an SOI substrate, comprising the following steps:

[0049] S1. Select the FD-SOI substrate for RCA cleaning and place it in the reaction chamber of the UHV-CVD system to maintain a vacuum of 5×10 - 6 Pa, slowly heat the substrate to 900°C and keep it for 30min for pretreatment;

[0050] S2. Lower the temperature of the substrate to 750°C and inject Si 2 h 6 Growth of 100nm Si buffer layer;

[0051] S3. Lower the temperature of the substrate to 450°C, and at the same time introduce the source material Si 2 h 6 and GeH 4 , start Ge x Si (1-x) Gradient transition layer growth: grow Ge first 0.24 Si 0.76 50min, then stop feeding Si 2 h 6 , lower the temperature to 330°C and continue to grow the low-temperature Ge layer for 2 hours. After the growth of the low-temperature Ge layer is completed, the temperature is adjusted to 600°C. After growing the high-pu...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a GaAs epitaxial film based on an SOI substrate and a preparation method and application. The GaAs epitaxial film includes an FD-SOI substrate, a Si buffer layer, a GeSi gradedtransition layer, and a GaAs epitaxial film arranged in this order from bottom to top; The preparation method includes a substrate selection and pretreatment, a Si buffer layer growth, a GeSi gradient transition layer growth, and a GaAs epitaxial film growth; the method can be widely used in the preparation of CMOS circuits and devices, HEMT RF devices, bipolar circuits and devices, BiCMOS circuits and heterojunction devices. The lattice constant and the thermal expansion coefficient of the GeSi graded transition layer material are close to the GaAs epitaxial film, and are used as a transition layer. The method combines the high frequency, low power consumption and high output power characteristics of GaAs materials with the junction capacitance, low leakage current and low power consumption of SOI materials with important theoretical and practical significance.

Description

technical field [0001] The invention belongs to the technical field of semiconductor materials, and relates to a GaAs epitaxial film based on an SOI substrate, a preparation method and application thereof. Background technique [0002] Monolithic microwave integrated circuit (MMIC) has the advantages of small size, low power consumption, low cost, strong reliability, strong anti-interference ability, etc., and is widely used in military electronics and civilian electronics industries. [0003] With the development of integrated circuits to the current ultra-large-scale era, most of them are made of bulk silicon materials, and the silicon substrate is more than 500 μm, but only the top layer of about 1 μm is actually used for manufacturing. The interaction between the device and the substrate produces A series of parasitic effects, large parasitic capacitance. To further increase the integration and operating speed of chips, the existing bulk silicon materials and processes ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/02H01L21/20H01L29/12
CPCH01L21/02293H01L21/20H01L29/12H01L2223/6683H01L2924/1423
Inventor 王智勇李颖兰天
Owner BEIJING UNIV OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com