Trench step gate type IGBT chip

Abstract

The invention provides a trench step gate type IGBT chip. The chip comprises a substrate and a first trench gate located in the surface of the substrate, the first trench gate is a solid grate in structure, each gate oxidation layer of the first trench gate consists of different gate oxygen thickness, and the gate oxygen thickness of the gate oxidation layer on the upper side is smaller than thatof the gate oxidation layer on the lower side. According to the trench step gate type IGBT chip, thinner gate oxidation layers are adopted in an effective trench working zone, thicker gate oxidation layers are adopted at the bottom of the trench, so that the chip density is improved, the consumption is reduced, the control capacity of the gate for a switch is improved, the voltage endurance capacity of the bottom of the trench is improved, the output capacitance is reduced, and the switch loss is reduced. Meanwhile, the P trap dosage is increased to maintain Vth at the same level, and the latching resistance of a device is enhanced, so that the electric property and reliability of the chip are optimized while the current density of the chip is improved.

Description

technical field [0001] The present invention relates to the field of semiconductor devices, in particular to a trench gate IGBT chip with a gate oxide layer with a step morphology. Background technique [0002] Since the advent of IGBT devices around 1980, they have been widely used in rail transportation, smart grids, industrial Frequency conversion, new energy development and other fields. [0003] With the mature application of trench technology in IGBT device structures, researchers have replaced the planar gate structure with a trench gate structure, such as figure 1 As shown in the schematic cross-sectional view of the trench gate IGBT chip structure in the prior art, the trench gate IGBT forms the trench gate through an etching process, and successfully realizes the transformation of the current channel from the surface lateral to the internal vertical, effectively eliminating the JFET in the planar gate body. effect, and greatly increase the cell density, thereby g...

AI Technical Summary

Problems solved by technology

However, for medium and high voltage devices, excessive channel density will lead to excessive power density per unit area of ​​the chip, resulting in excessive heat loss and affecting its application.

In addition, due to the need to take into account the withstand voltage capability of the bottom of the groove, the current chip uses a relatively thick gate oxide layer.

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