Processing circuit and neural network operating method thereof

Abstract

The invention provides a processing circuit and a neural network operating method thereof. The processing circuit comprises a plurality of processing elements, a plurality of accessory memories, a system memory and a configuration module, wherein the processing elements are used for performing operation processing; each accessory memory is corresponding to one processing element and is coupled with the other two accessory memories; the system memory is coupled with all the accessory memories and is accessible to the processing elements; the configuration module is coupled with the processing elements and the corresponding accessory memories and the system memory to form a network-on-chip architecture; and the configuration module is capable of statically configuring the operations of the processing elements and the data transmission in the network-on-chip architecture according to neural network operations. Therefore, the neural network operations can be optimized and high operation efficiency is provided.

Description

technical field [0001] The present invention relates to a processing circuit architecture, and in particular to a processing circuit of a network-on-chip (NOC) architecture and a neural network (Neural Network, NN) operation method thereof. Background technique [0002] Each processor core in a multi-core central processing unit (Central Processing Unit, CPU) and its high-speed cache (Cache) are connected to each other (interconnect can form a general network-on-chip (Network-on-Chip, NOC) architecture) ( For example, a ring bus (ring bus, etc.), and this architecture can generally cope with a wide range of functions, so as to realize parallel computing and improve processing performance. [0003] On the other hand, a neural network is a mathematical model that imitates the structure and function of a biological neural network, which can evaluate or approximate functions, and is often used in the field of artificial intelligence. Generally speaking, the execution of neural ...

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Problems solved by technology

[0004] However, in order to support a wide range of applications in general NoC architecture, its data exchange is based on packets, so that packets can be routed to their destinations in the network-on-chip architecture, and dynamic routing configuration is used to adapt to various applications , while neural network operations require repeated execution of a large number of data transfers between memories, it is inefficient to use a general-purpose Noc architecture to map neural network algorithms

In addition, in some other existing NoC architectures, the processing element (Processing Element, PE) connected to the system memory is fixed, and the processing element output to the system memory is also fixed, so that the depth of the pipeline (pipeline) Fixed, so it is not suitable for neural network calculations of terminal devices such as desktop computers and laptops with a small amount of calculation

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