Memristor with neural bionic function and preparation method and application

A bionic function and memristor technology, which is applied in the field of memristor with neuron bionic function and its preparation, can solve the problems of high operating voltage, small resistance change, large power consumption, etc., and achieve low operating voltage and resistance change. Large, low-power effects

Active Publication Date: 2020-01-14
HEBEI UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a memristor with neurobionic function and its preparation method and application, so as to solve the common problems of small resistance change, high operating voltage and large power consumption in existing memristors

Method used

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  • Memristor with neural bionic function and preparation method and application
  • Memristor with neural bionic function and preparation method and application
  • Memristor with neural bionic function and preparation method and application

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] Such as figure 1 As shown, the memristor with neurobionic function provided by the present invention, its structure includes Pt / Ti / SiO 2 / Si substrate 1, in Pt / Ti / SiO 2 The Ag bottom electrode layer 2 formed on the Pt film layer of the Si substrate 1, the functional layer 3 formed on the Ag bottom electrode layer 2, and the Ag top electrode layer 4 formed on the functional layer 3. The functional layer 3 includes a first zirconium hafnium oxide film layer 31 , a graphene oxide quantum dot intermediate layer 32 and a second zirconium hafnium oxide film layer 33 from bottom to top. Among them, Pt / Ti / SiO 2 / The bottom of Si substrate 1 is the Si film layer, and the Si film layer is SiO 2 film, SiO 2 The Ti film layer is on the film layer, and the Pt film layer is on the Ti film layer. Therefore, the Pt film layer is Pt / Ti / SiO 2 / the topmost layer of the Si substrate 1 .

[0037] The thickness of the functional layer 3 is 10-20nm, wherein the thickness of the graphen...

Embodiment 2

[0048] (1) Pt / Ti / SiO 2 / Si substrate 1 is placed in a beaker filled with acetone, cleaned by ultrasonic waves for 10 minutes, then placed in a beaker filled with alcohol and cleaned by ultrasonic waves for 10 minutes, then taken out with clips and placed in a beaker filled with deionized water for ultrasonic cleaning 5min, then take it out and use nitrogen (N 2 ) and blow dry.

[0049] (2) using such as figure 2 For the magnetron sputtering equipment shown, open the cavity 4, take out the table 7, first polish it with sandpaper until it shines, clean the organic matter attached to the surface of the table with acetone, and finally wipe it clean with alcohol; put the cleaned Pt / Ti / SiO 2 / Si substrate 1 is placed on the table 7 for tableting, and the Pt / Ti / SiO is ensured during tableting 2 / Si substrate 1 is firmly pressed on the tablet press table 7 and flattened to ensure uniform film growth during sputtering. After the tablet press is completed, it is placed on the subst...

Embodiment 3

[0055] Embodiment 3 Performance testing of memristor

[0056] (1) The synapse simulation function of the device prepared in Example 2 was tested, and the results are shown in image 3 and Figure 4 shown. in image 3 It is a graph obtained by continuously applying 15 circles of 0.7v, 50ns pulse width square wave to the device. It can be seen from the graph that as the number of pulses increases, the current of the device increases gradually, and the resistance value decreases continuously. Figure 4 It is a picture obtained by continuously applying 15 circles of -0.7v, 50ns pulse width square wave to the device. It can be seen from the figure that as the number of pulses increases, the current of the device decreases gradually, and the resistance value increases continuously. pass image 3 and Figure 4 , indicating that the resistance of the memristive device is adjustable and has a good neurobiological effect.

[0057] (2) Paired pulse facilitation (PPF) in biological...

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Abstract

The invention discloses a memristor with neural bionic function, its structure includes a substrate, an Ag bottom electrode layer formed on the substrate, and a function formed on the Ag bottom electrode layer from bottom to top. layer and an Ag top electrode layer formed on the functional layer; the functional layer includes a first zirconium hafnium oxide film layer, a graphene oxide quantum dot intermediate layer and a second zirconium hafnium oxide film layer from bottom to top. At the same time, the invention also discloses the preparation method and application of the memristor. Through the design of the specific structure of the present invention, the final prepared memristor has a good neurobiological effect; especially in the functional layer, the graphene oxide quantum dot intermediate layer is arranged on the first zirconium hafnium oxide film layer and the second zirconium hafnium oxide film layer. Between hafnium oxide film layers, this can precisely control the growth and rupture of conductive filaments to improve the uniformity of the device, which can make the device have more stable resistance changes, lower power consumption, and better stability and uniformity.

Description

technical field [0001] The invention relates to a memristor and its preparation method and application, in particular to a memristor with neurobionic function, its preparation method and application. Background technique [0002] Memristors are another new passive circuit element after resistors, capacitors, and inductors. Simply put, a memristor is a non-linear resistor with a memory function. It is a two-terminal device and belongs to a typical sandwich structure based on the apex electrode-dielectric layer-bottom electrode, so it can be integrated at high density. Its working principle mainly uses the reversible transition phenomenon between the high and low resistance states of the intermediate dielectric layer under the action of different electric excitations to store data, that is, to change its resistance value by controlling the change of current, if the high resistance value Defined as "1" and low resistance value as "0", then this kind of resistance can realize t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L45/00
CPCH10N70/24H10N70/011H10N70/8833
Inventor 闫小兵张磊王静娟李小燕
Owner HEBEI UNIVERSITY
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