Method for improving roughness of side wall formed through deep silicon etching

A technology of sidewall roughness and deep silicon etching, which is applied in the process of producing decorative surface effects, decorative art, gaseous chemical plating, etc., can solve the problem that the final size of the silicon groove deviates from the preset size, etc., and achieve improved roughness degree, meet device design requirements, high smoothness effect

Inactive Publication Date: 2018-01-19
JIANGSU LEUVEN INSTR CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The limitation of this method is that a thick layer of sidewall structure is removed during post-processing, making the final dimensions of the silicon trenches deviate from the preset dimensions

Method used

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  • Method for improving roughness of side wall formed through deep silicon etching
  • Method for improving roughness of side wall formed through deep silicon etching
  • Method for improving roughness of side wall formed through deep silicon etching

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Embodiment 1

[0038]In this embodiment, a through hole with a diameter of 10 μm and a depth of 200 μm is etched on the silicon substrate by Bosch process, and then the polymer on the side wall is cleaned and removed, and the obtained through hole has a side wall with a roughness of 50 nm. The above-mentioned processes can all adopt conventional processes, which will not be repeated here.

[0039] Next, the method for improving the roughness of the sidewall of the deep silicon etching of the present invention is used to planarize the sidewall of the via hole. First, in the deposition step S1 , 50 nm thick amorphous silicon is deposited on the sidewall of the through hole by using low pressure chemical vapor deposition (LPCVD). Among them, the growth temperature of amorphous silicon is set at 600°C, and the reaction gas is SiH 4 5% SiH 4 The mixed gas with He, the chamber pressure is 50mTorr, and the deposition time is 5min. Then, in the etching step S2, gaseous XeF 2 The silicon is etche...

Embodiment 2

[0043] In this embodiment, a deep groove with a diameter of 10 μm and a depth of 200 μm is etched on a silicon substrate by using the Bosch process, and then the polymer on the sidewall is removed by cleaning, and the roughness of the sidewall of the obtained deep hole is 55 nm. The above-mentioned processes can all adopt conventional processes, which will not be repeated here.

[0044] Next, the sidewall of the deep trench is planarized by using the method for improving the roughness of the sidewall of deep silicon etching of the present invention. First, in the deposition step S1, 55nm thick amorphous silicon is deposited on the sidewall of the deep trench by pulsed plasma enhanced chemical vapor deposition. The growth temperature of amorphous silicon is 350°C, and the reaction gas is SiH 4 5% SiH 4 and a mixed gas of He, the cavity pressure is 50 mTorr, the deposition time is 5 min, the power is 300 W, and the duty cycle of the pulse is 50%. Then, in the etching step S2,...

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Abstract

The invention discloses a method for improving the roughness of a side wall formed through deep silicon etching. The method comprises the following steps of a deposition step: depositing a silicon layer with a certain thickness on a side wall, formed by etching, with a high-aspect-ratio structure; an etching step: carrying out isotropic etching on the silicon layer; and a judgement step: judging whether the roughness of the side wall reaches a default value or not, if the roughness of the side wall does not reach the default value, returning to the deposition step and repeating a cycle from the deposition step to the etching step, and if the roughness of the side wall reaches the default value, ending the process. The roughness of the side wall formed through deep silicon etching can be effectively improved through circularly executing the deposition step and the etching step, the shape and form with higher smoothness can be obtained, meanwhile, the size of the formed high-aspect-ratiostructure is prevented from deviating from a default size, and the design requirements of a device are met.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for improving the roughness of deep silicon etching sidewalls. Background technique [0002] With the continuous development of integrated circuits and micro-electro-mechanical systems (MEMS) technology, deep silicon etching technology has emerged to meet the needs of through-silicon via etching (TSV) and MEMS silicon substrate processing for 3D packaging technology. [0003] At present, the mainstream deep silicon etching technologies in the field of semiconductor manufacturing mainly include wet etching and dry plasma etching. The technology of wet etching silicon, for example, uses alkaline solution such as KOH for etching, but its application field is limited due to its lack of selectivity to photoresist and the limitation of selective etching of silicon crystal direction. Dry etching is widely used in the fields of through-silicon via etching and micro-elect...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3065B81C1/00
Inventor 许开东
Owner JIANGSU LEUVEN INSTR CO LTD
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