Semiconductor memory and manufacturing method thereof

Abstract

The invention provides a semiconductor memory and a manufacturing method thereof. The semiconductor memory comprises a semiconductor substrate, a double-sided capacitor array, a support cylinder. The semiconductor substrate is provided with a plurality of first pads in a memory array structure and a plurality of second pads located outside the memory array structure and on the periphery of the first pads. The double-sided capacitor array is formed on the first pads, and each double-sided capacitor comprises a first conductive layer and a second conductive layer forming a double-U-shaped structure, a capacitor dielectric and a third conductive layer. The support cylinder is formed on the second pads, and comprises dummy holes with no electrical function. In the invention, the double-sided capacitor with a double-U-shaped lower electrode arranged in a hexagonal array is manufactured by using a multi-patterning method and a support structure reinforced by a boundary process, and has a large height-to-width ratio and can effectively increase the capacitance per unit area.

Description

technical field [0001] The invention belongs to the field of semiconductor devices and manufacturing, in particular to a semiconductor memory and a manufacturing method thereof. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell generally includes a capacitor 10 and a transistor 11; the gate of the transistor 11 is connected to the word line 13, the drain is connected to the bit line 12, and the source is connected to the capacitor 10; the voltage signal on the word line 13 can control the transistor 11 Open or close, and then read the data information stored in the capacitor 10 through the bit line 12, or write the data information into the capacitor 10 through the bit line 12 for storage, such as figure 1 shown. [0003] Most of the capacitors in the existing DRAM have a single-sided capacitor structure, which severely li...

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Problems solved by technology

[0003] Most of the capacitors in the existing DRAM have a single-sided capacitor structure, which severely limits the improvement of the capacitance value per unit area.

[0004] In addition, the existing capacitor array usually adopts the masking layer 20 of the rectangular window 22 to deal with the margin, such as figure 2 As shown, the masking layer of such a rectangular window usually passes through the position of several capacitors 21 located on the edge, resulting in the partial loss of these several capacitors located on the edge, which greatly reduces the overall performance of the capacitor array and affects the subsequent capacitors. Metal connection with other chips and stability in packaging applications

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