Stabilizing circuit of charge pump output voltage

Abstract

The invention discloses a stabilizing circuit of a charge pump output voltage. The stabilizing circuit of the charge pump output voltage comprises two comparison paths, a comparison device and a controller; the two comparison paths are used for providing two input ends of a reference voltage and a detection voltage to the comparison device, the controller controls a charge pump according to a comparison result so as to make the output voltage maintain steady. When the two comparison paths conduct mirroring through an NMOS pipe and make the output voltage steady through two sub-circuits, the image current of the two comparison paths is irrelevant with supply voltage and the two comparison paths have positive temperature coefficients. The output voltage of the charge pump is the superposition of all resistive voltages which have positive temperature coefficients in a second comparison path, and all diode voltages which have negative temperature coefficients and all source-drain voltages of second NMOS pipes which have negative temperature coefficients, the superposition of the positive and negative temperature coefficients can make the temperature coefficients of the output voltage of the charge pump decrease to be approaching zero, and thus the stability of the output voltage of the charge pump can be improved. The stabilizing circuit of the charge pump output voltage can also shorten the time for refreshing the reference voltage and the detection voltage, and thus lowering the power dissipation.

Description

technical field [0001] The invention relates to the manufacture of a semiconductor integrated circuit, in particular to a circuit for stabilizing the output voltage of a charge pump. Background technique [0002] The flash memory circuit often needs to adopt a voltage higher than the power supply voltage, that is, the voltage HV, and the voltage HV needs to be output by the charge pump, which is the output voltage of the charge pump. In the existing flash memory circuit, when the flash memory is switched to the standby state, it is often necessary to use the voltage HV, and fast reading is realized by keeping the voltage HV stable in the standby state. In order to keep the voltage HV stable in the flash standby state, it is necessary to design a stabilization circuit for the output voltage of the charge pump, such as figure 1 Shown is the stable circuit diagram of the existing charge pump output voltage; figure 1 The medium stability circuit includes two comparison paths, ...

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Problems solved by technology

[0004] However, when the existing stable circuit is actually used, the power supply voltage VDD itself will fluctuate, which will cause greater fluctuations in HV. For example, when the power supply voltage VDD fluctuates between 1.3V and 1.7V, the stable value should be 2.7 The voltage HV of V will fluctuate between 2.35V and 3.05V, and the fluctuation range is large, which affects the stability of HV

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