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Neuromorphic synapses

A neuromorphic and synaptic technology, applied in neural architecture, neural learning methods, biological neural network models, etc., can solve problems such as inefficiency and slowness

Active Publication Date: 2017-05-31
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This is a slow, inefficient process compared to the real-time operation of biological systems

Method used

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  • Neuromorphic synapses
  • Neuromorphic synapses
  • Neuromorphic synapses

Examples

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Embodiment Construction

[0039] figure 2 A schematic circuit diagram of a neuromorphic system 10 embodying the invention is shown. System 10 includes synapses, generally indicated at 11 , connected between pre-neuronal circuits 12 and post-neuronal circuits 13 . The synapse 11 comprises a resistive memory cell, here a PCM cell 15, represented in the circuit as a variable resistor R PCM . As indicated schematically by enlargement in the figure, the PCM cell 15 includes a volume of chalcogenide compound 16 disposed between a first (“upper”) electrode 17 and a second (“lower”) electrode 18 . In this particular "mushroom cell" structure, the lower electrode 18 has a smaller contact area with the chalcogenide 16 than the upper electrode 17 . The variable resistance characteristic of the PCM cell 15 results from changing the relative proportions of the high resistance amorphous phase 19 and the low resistance crystalline phase 20 of the chalcogenide material 16 . In the embodiment to be described, it i...

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Abstract

A neuromorphic synapse (11) comprises a resistive memory cell (15) connected in circuitry having first and second input terminals (21,22).These input terminals (21,22) respectively receive pre-neuron and post-neuron action signals, each having a read portion and a write portion, in use. The circuitry also has an output terminal (23) for providing a synaptic output signal which is dependent on resistance of the memory cell (15).The circuitry is operable such that the synaptic output signal is provided at the output terminal (23) in response to application at the first input terminal (21) of the read portion of the pre-neuron action signal,and such that a programming signal,for programming resistance of the memory cell (15), is applied to the cell (15) in response to simultaneous application of the write portions of the pre-neuron and post-neuron action signals at the first and second input terminals (21,22) respectively. The synapse (11) can be adapted for operation with identical pre-neuron and post-neuron action signals.

Description

technical field [0001] The present invention relates generally to neuromorphic synapses. Neuromorphic synapses based on resistive memory cells are provided, along with synaptic arrays and systems incorporating such synapses. Background technique [0002] Neuromorphic technologies involve computing systems inspired by the biological architecture of the nervous system. Traditional computing architectures are becoming increasingly inadequate to meet the ever-expanding processing demands placed on modern computer systems. Compared to the human brain, the classic von Neumann computer architecture is very inefficient in terms of power consumption and space requirements. The human brain takes up less than 2 liters and consumes about 20W of power. Simulating 5 seconds of brain activity using a state-of-the-art supercomputer takes about 500 seconds and requires 1.4MW of power. These questions have driven important research efforts to understand efficient computational paradigms o...

Claims

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Application Information

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IPC IPC(8): G06N3/10
CPCG06N3/049G06N3/063G06N3/088G11C11/54G11C13/0004
Inventor E·S·伊莱夫舍利欧A·潘塔兹A·塞巴斯蒂安T·图马
Owner SAMSUNG ELECTRONICS CO LTD
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