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Parallel CRC (Cyclic Redundancy Check) error correction method having single bit error correction function

An error correction method and parallel algorithm technology, applied in the field of communication, can solve the problems of slow transmission speed, low data transmission efficiency, slow operation, etc., to reduce packet error rate, improve transmission efficiency and reliability, and reduce storage space. Effect

Active Publication Date: 2017-05-31
FLIGHT AUTOMATIC CONTROL RES INST
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Problems solved by technology

[0008] The purpose of the present invention is to solve the problem that the transmission speed is limited by one data line in the serial data transmission process, the slow operation of the serial CRC algorithm based on serial transmission and the low efficiency of data transmission based on packet loss and retransmission The problem

Method used

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  • Parallel CRC (Cyclic Redundancy Check) error correction method having single bit error correction function
  • Parallel CRC (Cyclic Redundancy Check) error correction method having single bit error correction function

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example 1

[0072] First, create a lookup table, set a certain bit in a packet of data to '1', and set all other bits to '0', respectively calculate the CRC value when different bits are '1' and compare them Placed in the corresponding lookup table location for subsequent resolved queries. Here set z i For the case where the i-th bit in the data packet is '1', T[CRC G (z i )] is the CRC value calculated when the i-th bit is '1'. A simple example is used here to illustrate how the lookup table is generated. Let the CRC check polynomial be G=x 3 +x+1, can be expressed as 1011, the transmitted data is 4 bits, here we need 3 CRC as the check digit of the data, then z 1 = 1000000, at this point we have CRC G (z 1 )=5, similarly we can get CRC G (z 2 )=7, CRC G (z 3 ) = 6, CRC G (z 4 )=3, CRC G (z 5 ) = 4, CRC G (z 6 )=2 and CRC G (z 7 )=1. If the results of any two CRC operations are not the same, then we can consider the CRC G for z i It has single mapping, that is, the c...

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Abstract

The invention relates to the technical field of communications, and specifically relates to a single bit error correction method based on parallel CRC (Cyclic Redundancy Check). The aim of the method is to solve the problems of low speed caused by a reason that the transmission speed is limited by a data wire in the serial data transmission process, slow calculation of a series CRC algorithm based on serial transmission and low data transmission efficiency based on packet loss or retransmission.

Description

[0001] Technical field: [0002] The invention relates to the field of communication technology, in particular to a parallel CRC-based single-bit error correction method. [0003] Background technique: [0004] Today's world is an information-based world, and communication is indispensable for information interaction and communication in all walks of life. CRC check, as a data packet check strategy that is easy to implement in both software and hardware, has been widely used in various data interactions. However, CRC algorithms are mostly used for data checks. Using the data automatic error correction function instead of data retransmission or packet loss can effectively improve the energy consumption and data transmission efficiency of the data transmission network. In a relatively good environment, single-bit error correction has its own natural advantages in terms of software and hardware implementation and error correction reliability. [0005] Assuming that the transmiss...

Claims

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Application Information

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IPC IPC(8): H04L1/00
CPCH04L1/0061
Inventor 韩骥宇李锐王磊
Owner FLIGHT AUTOMATIC CONTROL RES INST
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