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Formation method of LDMOS (Lateral Diffusion MOS) transistor and LDMOS transistor

A technology of transistors and semiconductors, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as poor performance of fin-type LDMOS transistors, and achieve the effect of improving performance

Active Publication Date: 2016-08-03
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0015] The problem solved by the present invention is the poor performance of the prior art fin-type LDMOS transistors

Method used

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  • Formation method of LDMOS (Lateral Diffusion MOS) transistor and LDMOS transistor
  • Formation method of LDMOS (Lateral Diffusion MOS) transistor and LDMOS transistor
  • Formation method of LDMOS (Lateral Diffusion MOS) transistor and LDMOS transistor

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Experimental program
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Effect test

Embodiment 1

[0070] This embodiment This embodiment provides a method for forming an LDMOS transistor, which is described by using a common drain of two adjacent LDMOS transistors.

[0071] combined reference Figure 8 and Figure 9 , providing a semiconductor substrate 20 .

[0072] In this embodiment, the semiconductor substrate 20 is a silicon substrate. The semiconductor substrate 20 has at least one fin 201 . There is an insulating layer 202 lower than the fins 201 between the fins 201 . The material of the insulating layer 202 is silicon oxide. The specific formation method is as follows:

[0073] At least one protruding structure is formed on the semiconductor substrate 20, and then an insulating layer 202 having the same height and lower than the protruding structure is formed between the protruding structures, and the insulating layer 202 plays an insulating role between semiconductor devices. The protruding structure higher than the insulating layer 202 is the fin 201 .

...

Embodiment 2

[0150] refer to Figure 12 , the present invention also provides an LDMOS transistor structure, two adjacent LDMOS transistors share one drain. It specifically includes: a semiconductor substrate 20, the semiconductor substrate 20 has a fin 201, and the fin 201 has a well region therein; a gate structure 21 and a second gate structure 22;

[0151] The first source 251 and the drain 264 in the semiconductor substrate on both sides of the first gate structure 21, the second source 252 and the drain in the semiconductor substrate on both sides of the second gate structure 22 264, the drain 264 is a common drain of two adjacent LDMOS transistors;

[0152] The LDMOS transistor in this embodiment also includes:

[0153] The drift region 203, the drift region is located in the fin portion 201, surrounded by the well region, the first gate structure 21 and the second gate structure 22 respectively partially cover the drift region 203, and the The drain 264 is located in the drift ...

Embodiment 3

[0164] refer to Figure 13 This embodiment provides a method for forming an LDMOS transistor. The difference between this embodiment and Embodiment 1 is that Embodiment 1 has two sources, namely a first source and a second source. The first source and the second source share one drain. The LDMOS transistor in this embodiment has only one source 35, and the drain 364 in this embodiment is not a common drain. In this embodiment, there is only one gate structure 31 between the source 35 and the drain 364 . The gate structure 31 partially covers the drift region 303 .

[0165] A first barrier layer 331 to a first barrier layer 334 are formed on the drift region to define the position and width of the drain. The details are as follows: in the drift region 203 , two adjacent first barrier layers 333 and 334 define the position and width of the drain 364 .

[0166] In other embodiments, the first gate structure and the first barrier layer closest to the first gate structure defin...

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Abstract

The invention relates to a formation method of an LDMOS (Lateral Diffusion MOS) transistor and an LDMOS transistor. The formation method of the LDMOS transistor comprises the steps of providing a semiconductor substrate, wherein the semiconductor substrate is provided with a fin portion, and the fin portion is internally provided with a well region, forming a drift region in the fin portion, wherein the drift region surrounds the drift region, forming a gate structure stretching across the fin portion, wherein the gate structure covers the top and side walls of the fin portion, and the gate structure partially covers the drift region, forming a source electrode material layer and a drain electrode material layer in the fin portion at two sides of the gate structure, and the drain electrode material layer is located inside the drift region, and carrying out ion implantation on the source electrode material layer and the drain electrode material layer so as to form a source electrode and a drain electrode. The performance of the LDMOS transistor can be improved by adopting the method provided by the invention.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming an LDMOS transistor and the LDMOS transistor. Background technique [0002] Lateral Diffusion MOS (LDMOS) is widely used in power devices due to its high breakdown voltage and compatibility with CMOS technology. Compared with traditional MOS transistors, LDMOS devices have at least one isolation structure between the drain region and the gate. When the LDMOS is connected to a high voltage, the isolation structure is used to withstand a high voltage drop and obtain a high breakdown voltage. [0003] The prior art discloses a fin-type LDMOS transistor, and the formation method of the above-mentioned fin-type LDMOS transistor is as follows: [0004] refer to figure 1 and figure 2 , providing a semiconductor substrate 10 having a first fin 111 , a second fin 112 and a third fin 113 located between the first fin 111 and the second fin 112 . The length of the th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP
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