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Computer system of heterogeneous hybrid memory architecture, control method of computer system and memory detection system

A computer system and hybrid memory technology, applied in the computer field, can solve the problem that NVM cannot be used as memory, and achieve the effect of reading and writing speed and cost balance

Inactive Publication Date: 2016-07-20
EVOC INTELLIGENT TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The traditional architecture determines that NVM is only used as an external storage device. During the computer startup process, the BIOS will not form a unified system memory report for NVM and DRAM, and NVM cannot be used as memory.

Method used

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  • Computer system of heterogeneous hybrid memory architecture, control method of computer system and memory detection system
  • Computer system of heterogeneous hybrid memory architecture, control method of computer system and memory detection system
  • Computer system of heterogeneous hybrid memory architecture, control method of computer system and memory detection system

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Embodiment Construction

[0034] Such as figure 1 Shown is a computer system with a heterogeneous hybrid memory architecture according to an embodiment. The computer system 10 with heterogeneous mixed memory architecture includes a memory unit 100 , a non-volatile storage unit 200 and a BIOS unit 300 . Both the memory unit 100 and the non-volatile storage unit 200 are connected to the computer system through a DIMM (DualInlineMemoryModules, dual inline memory module) interface.

[0035] The memory unit 100 is DRAM (Dynamic Random Access Memory, dynamic random access memory). The memory unit 100 is usually equipped with an SPD (SerialPresenceDetect, serial presence detection) chip, which is used to store the configuration information of the DRAM, such as the number of P-Banks, voltage, row address / column address number, bit width, and various main operating sequences etc. In addition, the storage capacity information of the memory unit 100 can also be stored. In this embodiment, the SPD chip provide...

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PUM

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Abstract

The invention relates to a computer system of heterogeneous hybrid memory architecture. The computer system comprises a memory unit, a non-volatile memory unit and a basic input and output system BIOS unit, wherein the memory unit comprises a first serial presence detect SPD chip and accesses the computer system through a dual inline memory module DIMM interface, and the first SPD chip comprises memory capacity information of the memory unit; the non-volatile memory unit comprises a second SPD chip and accesses the computer system through a DIMM interface, and the second SPD chip comprises memory capacity and memory type information of the non-volatile memory unit; the BIOS unit is used for acquiring capacity information of the second SPD chip at a power on self-test POST stage and then forming a system memory report by the capacity information of the second SPD chip and the memory capacity information of the memory unit. The invention further relates to a control method for the computer system and a memory detection system in the computer system. According to the computer system, the control method and the memory detection system, the whole computer system obtains a certain degree of balance on reading and writing speed and costs.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to a computer system with heterogeneous hybrid memory architecture, a computer system control method and a memory detection system. Background technique [0002] In view of the characteristics of cloud computing and big data, such as fast incremental speed and low time locality, the traditional computing-centric model is faced with limited memory capacity, high input / output pressure, low cache hit rate, and data processing challenges. There are many challenges such as low overall performance, and it is difficult to achieve the best balance between performance, energy consumption and cost, which makes the current computer system unable to handle big data above PB level. With the development of emerging non-volatile memory (Non-VolatileMemory, NVM) technology represented by resistive memory, ferroelectric memory, phase change memory, etc., the boundary between traditional me...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02G06F12/08G06F3/06G06F9/445
Inventor 郭齐运李杨庞观士徐成泽王志远沈航梁艳妮陈志列耿稳强
Owner EVOC INTELLIGENT TECH
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