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Method for realizing server hardware acceleration by using FPGA (field programmable gate array)

A hardware acceleration and server technology, applied in the computer field, can solve problems such as low efficiency, large memory access delay, and consistency impact, and achieve the effects of strong practicability, high bus bandwidth, and improved computing speed

Inactive Publication Date: 2015-05-27
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Problems solved by technology

For the data that needs to be frequently exchanged between the CPU and the accelerator, due to the impact of Cache consistency, the memory access delay is large and the efficiency is not high

Method used

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  • Method for realizing server hardware acceleration by using FPGA (field programmable gate array)

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Embodiment

[0031] Taking the realization of an image processing accelerator as an example, first implement the image processing algorithm acceleration module in FPGA with hardware description language (HDL). Since the image data generally requires a large storage space, the memory controller can be instantiated in the FPGA and connected to the memory chip outside the FPGA as the private memory space of the FPGA. Then realize the QPI bus module, wherein the protocol table of the protocol layer can be simplified according to the system structure. Then realize the Cache module and the message forwarding module in the FPGA. The address decoding table is set in the message forwarding module, and the address that the FPGA image processing module needs to access is correctly mapped to the FPGA private memory space and the system memory space. Carry out logic synthesis, layout and routing of the hardware accelerator system described in HDL language, generate executable bit stream files and load...

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Abstract

The invention discloses a method for realizing server hardware acceleration by using an FPGA (field programmable gate array). A specific realizing process of the method comprises the following steps: constructing a QPI (quick path interconnect) bus module, a hardware acceleration module, a high-speed buffer storage region and a message conversion module in the FPGA, wherein the massage conversion module is used for converting memory reading-writing operation launched by the hardware acceleration module into a series of QPI messages and sending the QPI messages to the QPI bus module, and sending reading-writing response returned by the QPI bus to the hardware acceleration module. Compared with the prior art, the method for realizing server hardware acceleration by using the FPGA disclosed by the invention can configure different acceleration algorithms for different computational scenes by virtue of the reconfigurability of the FPGA, is relatively high in flexibility and expansibility. The QPI bus is utilized to access a memory space of the system, so that higher bandwidth and smaller memory accessing delay, in comparison with those of a mainstream PCIe bus, are provided.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a highly practical server hardware acceleration method realized by FPGA. Background technique [0002] With the continuous expansion of computer application fields, various application scenarios also put forward higher and higher requirements for the data processing capabilities of servers. It is often difficult for servers to achieve balanced allocation of resources when they are used in scenarios that emphasize certain functions. To achieve the required processing speed, more powerful computing power is required, but this often means a large cost input. On the other hand, in some occasions that have strict requirements on data processing speed, it is difficult for ordinary servers to perform these tasks. At present, the more common solution is to share a part of the work of the central processing unit (CPU) by the hardware accelerator to undertake certain types of specific ...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/42
Inventor 岳自超童元满李仁刚
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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