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Full impedance distance protection method based on FPGA

A technology of distance protection and impedance protection, applied in the field of hardware algorithm implementation, which can solve the problems of poor reliability, low efficiency, and many starting components.

Inactive Publication Date: 2015-04-29
STATE GRID CORP OF CHINA +2
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Problems solved by technology

Full-impedance distance protection is a kind of distance protection with a wide range of applications. The existing technology mostly uses DSP as the core to realize impedance calculation. Due to its own structural reasons, this implementation method has slow speed, low efficiency, many starting components, and poor reliability. insufficient

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  • Full impedance distance protection method based on FPGA
  • Full impedance distance protection method based on FPGA
  • Full impedance distance protection method based on FPGA

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Embodiment Construction

[0045] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0046] The invention relates to an FPGA-based full-impedance distance protection method, wherein the distance protection refers to the distance (or impedance) between the reaction fault point and the protection installation site. It is a protective device that determines the action time according to the distance. The main component of the device is a distance (impedance) relay, which can measure the impedance value between the protection installation and the short-circuit point according to the voltage and current applied to its terminals. This impedance is called the measured impedance of the relay. When the short-circuit point is close to the protection installation, the measurement impedance is small and the action time is short; when the short-circuit point is far away from the protection installation, the measuremen...

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Abstract

The invention relates to a full impedance distance protection method based on an FPGA. The method includes the steps of 1 calculating impedance protection, 2 adopting an upper computer for definite value matching, 3 adopting a shifting multiplication and division method, 4 adopting a state machine for time division multiplexing, 5 testing the impedance protection characteristic and 6 carrying out simulation testing. Based on a hardware platform of the FPGA, the FPGA is used for calculating the processing speed of improving the hardware protection logic in parallel at high speed to ensure the safety and reliability of motions. By the adoption of a full impedance distance protection hardware algorithm based on the FPGA, judgment processes of starting elements such as positive sequence voltage, negative sequence voltage and currents are reduced, and real-time calculation and logical judgment are carried out to further protect the reliability of relay protection motions.

Description

technical field [0001] The invention relates to a hardware algorithm realization method, in particular to an FPGA-based full impedance distance protection method. Background technique [0002] Distance protection is a widely used protection method in power system transmission network. High-voltage transmission lines use distance protection as the main line protection, EHV and UHV transmission lines use distance protection as the line backup protection, and some lines also use distance longitudinal protection as the main protection for EHV and UHV lines. Full-impedance distance protection is a kind of distance protection with a wide range of applications. The existing technology mostly uses DSP as the core to realize impedance calculation. Due to its own structural reasons, this implementation method has slow speed, low efficiency, many starting components, and poor reliability. insufficient. Contents of the invention [0003] Aiming at the deficiencies of the prior art, ...

Claims

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Application Information

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IPC IPC(8): H02H7/26G01R27/08
Inventor 胡鹏飞袁玉湘屈志娟姜学平
Owner STATE GRID CORP OF CHINA
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