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Display device, array substrate, thin film transistor and fabricating method thereof

A technology of thin film transistor and manufacturing method, which is applied in the field of display devices and can solve problems such as reduction of on-state current

Inactive Publication Date: 2015-04-22
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a display device, an array substrate, a thin film transistor and a manufacturing method thereof, so as to overcome the strong off-state current of the TFT in the prior art, which causes the decrease of the on-state current due to the LDD structure when the TFT is working. TFT structure

Method used

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  • Display device, array substrate, thin film transistor and fabricating method thereof
  • Display device, array substrate, thin film transistor and fabricating method thereof
  • Display device, array substrate, thin film transistor and fabricating method thereof

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Effect test

Embodiment 1

[0041] Such as Figure 6 As shown, the embodiment of the present invention provides an array substrate, including a substrate 1, on which a buffer layer 2, a first gate 3 (ie, a bottom gate) and a first gate insulating layer 4 are provided, and the first An active layer 5 is provided on the gate insulating layer 4, and a second gate insulating layer 6, a second gate 7 (i.e., a top gate), a third gate insulating layer 11, and source-drain electrodes are sequentially provided on the active layer 5. 12 , the source and drain electrodes 12 are on the third gate insulating layer 11 . The outer sides of the region of the active layer 5 corresponding to the second gate 7 are lightly doped source and drain regions 91 and 101 and heavily doped source and drain regions 92 and 102, wherein the lightly doped source region 91 The drain lightly doped region 101 is next to the second gate 7, the source heavily doped region 92 is next to the source lightly doped region 91 and the drain heavi...

Embodiment 2

[0048] Example 2 as Figure 7 As shown, the difference between this embodiment and Embodiment 1 is that there is only a part of the first gate 3 in this embodiment, and it only needs to be disposed under the lightly doped drain region 101 in the region corresponding to the drain electrode.

[0049]The first gate 3 and the second gate 7 also use the advantage of LDD to reduce the off-state current, combined with the working principle of the bottom gate structure, when the TFT is working, that is, when the top gate is applied with gate voltage, the bottom gate is also simultaneously Turn on, so that the LDD region also induces carriers, so that the LDD region can avoid the decrease of the on-state current Ion due to the light doping under the action of the bottom gate electric field and the carriers generated by light doping. Similarly, when the top gate electric field of the TFT is removed, it is in the off state, and the bottom gate also removes its electric field at this time...

Embodiment 3

[0052] Such as Figure 8 As shown, the embodiment of the present invention also provides a manufacturing method based on the array substrate in Embodiment 1, and the specific steps include:

[0053] Step S31, forming the pattern of the first gate on the substrate;

[0054] Step S32, forming a first gate insulating layer on the substrate after the above steps;

[0055] Step S33, forming an active layer on the substrate after the above steps,

[0056] Step S34, forming a second gate insulating layer on the substrate after the above steps;

[0057] Step S35, forming a second gate pattern on the substrate after the above steps;

[0058] Step S36, performing heavy source-drain doping and light source-drain doping on the outside of the region of the active layer corresponding to the second gate; the source lightly doped region and the drain lightly doped region are adjacent to the second gate In the corresponding active layer, the source heavily doped region is adjacent to the s...

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Abstract

The invention relates to the technical field of display processes, and particularly relates to a display device, an array substrate, a thin film transistor (TFT) and a fabricating method thereof. The thin film transistor sequentially comprises a first gate electrode, a first gate insulation layer, an active layer, a second gate insulation layer, a second gate electrode, a third gate insulation layer, a source electrode and a drain electrode, wherein source and drain light-doped regions and source and drain heavy-doped regions are respectively arranged outside regions corresponding to the active layer and the second gate electrode, the source electrode and the drain electrode are electrically connected with the source heavy-doped region and the drain heavy-doped region; the first gate electrode is arranged below the drain light-doped region of the region corresponding to the drain electrode or the first gate electrode is divided into two parts which are respectively arranged below the light-doped regions of the regions corresponding to the source electrode and the drain electrode. The invention provides the display device, the array substrate, the thin film transistor and a fabricating method thereof. The OFF leakage current of the TFT is reduced by virtue of an LDD structure; meanwhile, the effect of the ON current of the TFT is improved by virtue of a bottom gate structure, and the yield of a product is increased.

Description

technical field [0001] The invention relates to the technical field of display technology, in particular to a display device, an array substrate, a thin film transistor and a manufacturing method thereof. Background technique [0002] In LCD (Liquid Crystal Display) or OLED (Organic Light Emitting Diode) displays, each pixel is driven by a TFT (Thin Film Transistor, Thin Film Field Effect Transistor) integrated behind the pixel, so that high-speed, High-brightness, high-contrast display screen information. In the current production technology, polysilicon or amorphous silicon is mostly used to manufacture TFTs. The carrier mobility of polysilicon is 10-200cm2 / V, which is significantly higher than that of amorphous silicon (1cm2 / V), so polysilicon has higher capacitance and storage than amorphous silicon. [0003] For LCDs and OLEDs, TFTs are generally formed on glass substrates. Due to the thermodynamic limitations of glass, the crystallization characteristics of polysilic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/786H01L29/423H01L29/08H01L21/28H01L21/336H01L27/12H01L21/84
CPCH01L27/1214H01L29/0847H01L29/401H01L29/42384H01L29/66484H01L29/66492H01L29/6675H01L29/66969H01L29/78648H01L29/78672H01L29/7869H01L21/28H01L29/78645H01L29/786H01L21/02532H01L21/02565H01L21/02592H01L21/02595H01L21/02675H01L21/0273H01L21/266H01L21/426H01L27/1218H01L27/1222H01L27/1225H01L27/1274H01L29/78603H01L29/78618
Inventor 石磊许晓伟
Owner BOE TECH GRP CO LTD
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