rfldmos device and its manufacturing method

Abstract

The invention discloses an RFLDMOS device. The thickness of a first metal silicide layer formed on the top surface of a polysilicon gate is greater than that of second metal silicide layers formed on the surfaces of source and drain regions, and the second metal silicide layers are formed on the bottoms of contact holes of the source region and the drain region. The invention further discloses a manufacturing method of the RFLDMOS device. By thickening the first metal silicide layer, the resistance of the gate can be reduced, and low resistance of the gate is easily ensured. By reducing the thickness of the second metal silicide layers, consumption of the second metal silicide layers to second conductivity type heavily doped regions of the source region and the drain region can be reduced, the reverse breakdown voltage of the RFLDMOS device can be stabilized, the breakdown voltage of the device can be integrally increased, and the reliability of the device can be improved. No additional photomask needs to be adopted to define the forming regions of the second metal silicide layers, the steps of the photo-etching process are reduced by one, and the process cost is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a radio frequency lateral field effect transistor (RF LDMOS) device; the invention also relates to a method for manufacturing the RF LDMOS device. Background technique [0002] RF Lateral Field Effect Transistor (RF LDMOS) is a common device used in RF base stations and broadcasting stations. Such as figure 1 Shown is a schematic structural diagram of an existing RFLDMOS device. Taking an N-type device as an example, the existing RFLDMOS device includes: a P-type heavily doped, ie P+ doped, silicon substrate 101, and the doping concentration of the silicon substrate 101 is greater than 1e20cm -3 ; P-type lightly doped silicon epitaxial layer 102, the doping concentration and thickness of the silicon epitaxial layer 102 depends on the drain end operating voltage of the device, the higher the drain end operating voltage, the lower the doping of the sil...

AI Technical Summary

Problems solved by technology

Since the source / drain metal silicide, that is, the metal silicide 111 on the source region 107 and the drain region 108, is deposited in the same step as the gate metal silicide, the thickness of the source / drain metal silicide is too thick, and a large amount of The N-type heavy doping of the source region 107 and the drain region 108 is consumed, resulting in a large leakage current during the reverse breakdown of the RF LDMOS, and the breakdown voltage is not stable enough, resulting in a decrease in device reliability

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