A Radiation Hardened Flip-Flop Circuit Based on Complex Triple Interlock Unit

Abstract

The invention discloses a radiation-hardening trigger circuit based on a complex three-interlocking unit. The radiation-hardening trigger circuit is composed of a clock signal generating circuit, a D input filtering circuit, a C unit circuit, a voting circuit, and a main interlock. It consists of a storage circuit and a slave interlock circuit; the C unit circuit includes a first C unit circuit, a second C unit circuit and a third C unit circuit; the external clock signal CK generates the clock signal and external data through the clock signal generating circuit The signal D is input to the filter circuit through the D input filter circuit to generate the data signal after the master interlock circuit, the slave interlock circuit and the C unit circuit, the output data signal outputs the output signal Q of the entire flip-flop through the voting circuit. The technical scheme of the present invention adopts the complex three-interlock circuit to reinforce the flip-flop technology, which can ensure the stability of the output of the entire flip-flop circuit when the flip-flop circuit is disturbed by radiation and other interference and causes the circuit to flip, enhances its reliability, and greatly improves the flip-flop. Radiation resistance of the circuit.

Description

technical field [0001] The invention relates to the design of an anti-radiation circuit, in particular to an anti-radiation hardened trigger circuit based on a complex three-interlock unit. Background technique [0002] With the advancement of integrated circuit manufacturing technology, the reduction of device size and the improvement of operating speed, the influence of radiation on circuits has become more and more serious. The main impact of radiation on digital circuits is reflected in the single event effect and total dose effect. As deep submicron MOS devices become mainstream, especially when the process node of MOS circuits reaches below 65nm, the single event effect has become the most important factor affecting MOS devices. radiation effect. Single event effects are mainly divided into single event transients and single event upsets. [0003] In the radiation environment, MOS integrated circuits are bombarded by high-energy charged particles, especially the circ...

AI Technical Summary

Problems solved by technology

However, the main disadvantage of triple-mode redundancy and double interlock circuit reinforcement technology is that the reliability is not high. Assuming that the flip-flop probability without circuit-level reinforcement technology is P, without considering the correlation of sensitive nodes and the injected charge of node pairs Under the premise of tolerance to differences, after adopting triple-mode redundancy reinforcement, the flip-flop output probability is reduced to 3P 2 -2P 3 , and the flip-flop flip probability using double interlock hardening technology is P 2

Therefore, in order to ensure the normal operation of the circuit for a long time, a combination of circuit-level dual-interlock reinforcement and system-level triple-mode redundancy reinforcement is generally used, and this method will inevitably bring about a decrease in circuit area and power consumption. Doubling, it will also deteriorate the timing performance of the circuit and reduce the operating frequency

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