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Method for manufacturing thin film transistor and thin film transistor

A technology of thin-film transistors and polysilicon layers, which is applied in the manufacture of transistors, semiconductor devices, semiconductor/solid-state devices, etc., to achieve the effect of simplifying the manufacturing process and satisfying precise control

Active Publication Date: 2014-12-24
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0014] However, there is no better solution in the prior art to better control the size of the LDD structure

Method used

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  • Method for manufacturing thin film transistor and thin film transistor
  • Method for manufacturing thin film transistor and thin film transistor
  • Method for manufacturing thin film transistor and thin film transistor

Examples

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Embodiment Construction

[0041] In the embodiment of the present invention, when forming the n+ region and n- region of the LTPS TFF, the above-mentioned n+ region and n- region are formed by using the photoresist defining the gate pattern and the gate target pattern as shields respectively. The resist precision and gate target pattern precision are controllable, so that the precision of the n-region can meet the precise control of the LDD structure size of the low-temperature polysilicon thin film transistor, and simplify the manufacturing process of the LTPS TFF.

[0042] Before the method of the embodiment of the present invention is described in detail, several process flows involved in the embodiment of the present invention are briefly described, so as to better understand the embodiment of the present invention.

[0043] In semiconductor manufacturing, it is necessary to use selected images, graphics or objects to block the film layer to be processed in order to control the active area of ​​etch...

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Abstract

The invention discloses a method for manufacturing a low-temperature polycrystalline silicon thin film transistor and the low-temperature polycrystalline silicon thin film transistor. The method comprises the steps that a grid electrode metal layer is etched through a photoresist pattern to form a grid electrode middle pattern, wherein the size of the grid electrode middle pattern is larger than the size of a grid electrode target pattern; shielding is carried out through the photoresist pattern, and an n+ area is formed in a polycrystalline silicon layer; the redundant part, relative to the grid electrode target pattern, of the grid electrode middle pattern is removed through the dry etching technology so that the grid electrode target pattern can be obtained; shielding is carried out through the grid electrode target pattern, and an n- area is formed in the polycrystalline silicon layer. The precision of the n- area of the thin film transistor manufactured through the method can meet the requirement for accurate control over the LDD structure size of the low-temperature polycrystalline silicon thin film transistor, and meanwhile the manufacturing technological processes of LTPS TFF are simplified.

Description

technical field [0001] The invention relates to a thin-film transistor, in particular to a method for manufacturing a low-temperature polysilicon thin-film transistor and the low-temperature polysilicon thin-film transistor. Background technique [0002] Thin Film Transistor Liquid Crystal Display (TFT LCD) can be divided into polysilicon and amorphous silicon, the difference between the two lies in the different characteristics of the transistor. The molecular structure of polysilicon is arranged in a neat and directional manner in a crystal grain, so the electron mobility of polysilicon is higher than that of disordered amorphous silicon, so it has been widely used. [0003] Polysilicon mainly includes high-temperature polysilicon and low-temperature polysilicon. [0004] TFTs made of low-temperature polysilicon are divided into two types: N-type and P-type. N-type low-temperature polysilicon TFTs need to be provided with a low-doped drain (Lightly Drain Doping, LDD) to r...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/786
CPCH01L29/66757H01L29/78621H01L29/78675H01L29/786
Inventor 李淳东刘华锋李知勋
Owner BOE TECH GRP CO LTD
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