Manufacturing method of multi-phase low dielectric constant material layer

A technology of low dielectric constant materials and manufacturing methods, applied in the manufacture of semiconductor/solid state devices, circuits, electrical components, etc., can solve problems such as poor mechanical strength, and achieve high molding strength. Effect

Active Publication Date: 2017-01-25
李明
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The object of the present invention is to provide a method for manufacturing a multi-phase low dielectric constant material layer. This method can not only realize the accurate and convenient regulation of the dielectric constant value of the film, improve the flatness of the film, and make the chemical composition of the film more uniform. Nanotubes build a skeleton structure, which makes the film have high molding strength and uniform performance, which overcomes the shortcomings of poor mechanical strength of general materials, easy local collapse, and different performances in different regions.

Method used

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  • Manufacturing method of multi-phase low dielectric constant material layer
  • Manufacturing method of multi-phase low dielectric constant material layer
  • Manufacturing method of multi-phase low dielectric constant material layer

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Embodiment

[0030] Embodiment: a kind of manufacturing method of multi-phase low dielectric constant material layer, comprises the following steps:

[0031] Step 1. Evaporating a layer of aluminum film with a thickness of 80 nm on the silicon substrate by electron beam evaporation under vacuum conditions;

[0032] Step 2, then vapor-deposit a layer of nickel film with a thickness of 5nm to form a silicon wafer with a metal film under the condition of not breaking the vacuum;

[0033] Step 3: Anneal the metal thin film in step 2 at 600°C under the protection of ammonia gas flow for 3 minutes, then raise the temperature to 750°C, and feed in a mixture of ammonia and acetylene with a ratio of 4:1. Gas, the reaction time of this step is 15 minutes, the vacuum degree in the chamber is 7Torr, the plasma power is 210W, and the applied voltage is 530V, so that a layer of carbon is deposited on the silicon wafer of the metal film by the plasma enhanced chemical vapor deposition method. The nanotu...

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Abstract

The invention discloses a method for manufacturing a multi-phase low-dielectric-constant material layer. The method for manufacturing the multi-phase low-dielectric-constant material layer comprises the steps that firstly, an aluminum film with a thickness of 80 nm is evaporated on a silicon substrate under the vacuum condition according to the electronic beam evaporation method; then, a nickel film with a thickness of 5 nm is further evaporated on the silicon substrate so that a silicon wafer with the metal films can be formed; a carbon nano tube layer is deposited on the silicon wafer with the metal films according to the plasma enhancement chemical vapor deposition method so that a carbon nano tube layer base material layer can be formed; octamethylcyclotetrasiloxane and cyclohexane are evenly mixed and then are injected into a pressure-resistant stainless steel kettle, the octamethylcyclotetrasiloxane and cyclohexane are brought into a furnace body, and a film layer is deposited on the surface of the substrate through the octamethylcyclotetrasiloxane, the cyclohexane and bubble gas under the plasma condition. By the adoption of the method for manufacturing the multi-phase low-dielectric-constant material layer, the film forming strength is high, the performances are uniform, and the defects that ordinary materials are poor in mechanical strength, local parts are prone to collapse, and the performances of all areas are different are overcome.

Description

technical field [0001] The invention relates to a method for manufacturing a multi-phase low dielectric constant material layer, which belongs to the technical field of semiconductors. Background technique [0002] In the semiconductor industry, the interconnection between different devices in large-scale integrated circuits is mainly based on metal wires. With the continuous development of semiconductor manufacturing technology, the manufacturing process of integrated circuits continues to shrink. Capacitance (C), when the semiconductor manufacturing process shrinks to a certain extent, the resulting RC parasitic effect becomes more and more obvious. In order to further improve the performance of the integrated circuit and reduce the RC delay, it has a low dielectric constant (Low-k) Materials with unique properties have been continuously proposed and extensively studied. [0003] In the semiconductor industry, the methods commonly used to prepare thin films of low dielect...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/02274H01L21/76801H01L21/76828H01L2221/1005
Inventor 孙旭辉夏雨健
Owner 李明
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