Low-power-consumption acquisition system life evaluation method based on accelerated life test

Abstract

The invention provides a low-power-consumption acquisition system life evaluation method based on an accelerated life test, and belongs to the field of power consumption estimation and life prediction of low-power-consumption acquisition systems. According to the low-power-consumption acquisition system life evaluation method, the relation between electric current and electric work of a low-power-consumption acquisition system is analyzed through the Kirchhoff law, and a power consumption mathematical model of the whole system is established with consideration given to a periodical working mode of the low-power-consumption acquisition system; the accelerated life test is applied, the sleep time of the system is shortened, work of the system is accelerated till the low-power-consumption acquisition system cannot work, as a result, enough test samples are obtained in a short time, and fitting is conducted on unknown parameters of the mathematical model through a statistical method; finally, an accurate estimation formula of the working life of the low-power-consumption acquisition system is obtained, and the service life of the low-power-consumption acquisition system can be accurately predicted. According to the low-power-consumption acquisition system life evaluation method based on the accelerated life test, power consumption estimation errors caused by inaccurate chip parameters, circuit parasitic resistance and circuit parasitic capacitance can be reduced, and the obtained working life value of the system is closer to reality and more accurate.

Description

technical field [0001] The invention belongs to the fields of power consumption estimation and life prediction of a low-power consumption acquisition system, and in particular relates to a life evaluation method of a low-power consumption acquisition system based on an accelerated life test. Background technique [0002] At present, the research on power consumption estimation by domestic and foreign researchers is mainly divided into two aspects. On the one hand, it is the power consumption estimation of the register transfer level (Register-transfer level, RTL for short) level circuit; on the other hand, it is the power consumption estimation of the system level integrated circuit. The two are related to each other but also have many differences. There are mainly two methods for estimating power consumption of RTL-level circuits: one is dynamic estimation method, and the other is static estimation method. Dynamic estimation method is an analysis method based on simulatio...

AI Technical Summary

Problems solved by technology

If the power consumption estimation method of the RTL level circuit is used, there will be inaccurate chip parameters in the modeling and calculation process, and there will be parasitic capacitance and resistance in the circuit, and the interaction of various parts at the system level and the impact of the environment will not be considered.

Such power consumption estimation results are bound to be inaccurate, so this power consumption estimation method for RTL-level circuits is not suitable for low-power systems

If the system-level power consumption estimation method is used, the main problem is that the simulation process is cumbersome and time-consuming. At the same time, this highly abstract power consumption estimation model still cannot get rid of inaccurate chip parameters, parasitic capacitance, and parasitic capacitance in the circuit. Resistor Problem

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