Broadband CMOS (Complementary Metal-Oxide-Semiconductor Transistor) balun low noise amplifier

Abstract

The invention provides a broadband CMOS (Complementary Metal-Oxide-Semiconductor Transistor) balun low noise amplifier which aims at disadvantages of a traditional cascode balun amplifier. The broadband CMOS balun low noise amplifier is formed by a cascode input stage, a differential common gate isolation stage and a resistive load stage; the cascode input stage is formed by a cascade stage resistor, a first capacitor, a second capacitor, a first NMOS (N-channel metal oxide semiconductor FET) pipe and a second NMOS pipe which adopt a connecting mode through capacitance cross coupling and body cross coupling; the differential common gate isolation stage is formed by a third capacitor, a fourth capacitor, a third NMOS pipe and a fourth NMOS pipe which adopt a connecting mode through capacitance cross coupling; the resistive load stage is formed by a common gate branch circuit load resistor RCG and a common source branch circuit load resistor RCS. The broadband CMOS balun low noise amplifier has the advantages of improving circuit gain and noise performances, improving differential output balance and eliminating dependence on off-chip inductance and on-chip inductance in a large area on the basis that broadband characters and single-end-differential conversion are guaranteed.

Description

technical field [0001] The invention belongs to the field of electronic technology, in particular to radio frequency integrated circuit technology, in particular to a broadband CMOS balun low-noise amplifier. Background technique [0002] A low noise amplifier is an amplifier with a very low noise figure. It is generally used as a high frequency or intermediate frequency preamplifier for various radio receivers and an amplifying circuit for high-sensitivity electronic detection equipment. It is essential for almost all radio frequency receiver systems. One module is the low noise amplifier. Since the amplitude of the radio frequency signal received by the system is usually very weak, the noise of the amplifier itself may seriously interfere with the signal. Therefore, it is desirable to reduce this noise and provide a certain voltage gain to improve the output signal-to-noise ratio. In the RF receiving front end, the received signal from the antenna unit is basically a sing...

AI Technical Summary

Problems solved by technology

[0004] The first is that the noise is relatively large. The noise figure of the traditional cascode balun amplifier is large, generally exceeding 5dB, which is not suitable for the low noise requirements of the high-performance RF receiving front end;

[0005] The second is that the differential balance is poor. Because the traditional cascode balun amplifiers work separately in the common gate and common source states, the distribution parameters have a great influence on the balance, especially in the case of mid-high frequency design. And phase balance is difficult to control, so even if its input matching bandwidth is wide, it is difficult to achieve better differential balance in the broadband range, which limits its broadband application;

[0006] The third is poor isolation. Due to the poor isolation of the cascode balun amplifier, this will cause the output signal to return to the input, which is difficult to meet the system's requirements for isolation indicators;

[0007] The fourth is the source inductance under the traditional structure L ’ S The integration of the circuit and the chip area are limited. In order to ensure better input matching, the common source tube of the traditional cascode balun amplifier (that is, the first transistor M1 under the traditional structure ’ ) source is usually connected to a large choke inductance to the ground, the inductance value is very large in the low frequency band, generally requires an off-chip inductance, which increases the off-chip components of the circuit; in the frequency band above GHz, an on-chip spiral can be used inductor implementation, but the use of on-chip inductors greatly increases the chip area

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