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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve problems such as easy exposure and breakdown of LDMOS devices, and achieve the effect of increasing breakdown voltage and reducing costs

Active Publication Date: 2013-07-03
CSMC TECH FAB2 CO LTD
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AI Technical Summary

Problems solved by technology

[0019] Aiming at the deficiencies of the prior art, the present invention provides a manufacturing method of a semiconductor device, which solves the problem that the silicon at the edge of the oxide layer in the drift region of the HV LDMOS is easily exposed and causes the breakdown of the LDMOS device, and while ensuring the driving capability of the LDMOS device, improves the LDMOS breakdown voltage

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0047] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0048] In order to provide a thorough understanding of the present invention, in the following description, detailed steps will be set forth in order to illustrate the present invention. It is evident that the practice of the invention is not limited to specific details familiar to those skilled in the art. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0049] It should be understood that when the terms "comprising" and / or "comprising...

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Abstract

The invention discloses a manufacturing method of a semiconductor device, and relates to the field of semiconductor manufacturing. The manufacturing method of the semiconductor solves the problem that laterally diffused metal oxide semiconductor (LDMOS) devices break down due to the fact that silicon on the edges of an oxide layer of a LDMOS drift region is easy to be exposed. According to the technical scheme, the manufacturing method of the semiconductor device includes the following steps: a, providing a semiconductor substrate, wherein the semiconductor substrate comprises a LDMOS area and a complementary metal-oxide-semiconductor transistor (CMOS) area; b, forming a sacrificial oxide layer on the semiconductor substrate; c, removing the sacrificial oxide layer; d, forming a masking layer on the semiconductor substrate which is processed with the sacrificial oxide layer; e, forming the LDMOS drift region by using the masking layer as a masking film and forming the drift region oxide layer on the drift region; f, removing the masking layer. The manufacturing method of the semiconductor device is suitable for bipolar-CMOS-DMOS (BCD) technology and the like.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a semiconductor device. Background technique [0002] With the continuous development of integrated circuits, in order to save area, multiple devices are fabricated on the same chip at the same time. For example, in a BCD (Bipolar-CMOS-DMOS) process, a high voltage (HV) laterally diffused metal oxide semiconductor (LDMOS) device and a low voltage (LV) CMOS device are integrated on the same chip. Such as figure 1 As shown, LDMOS110 and CMOS120 are included on the semiconductor substrate 100, and are separated by a field oxide layer 114. LDMOS110 has a drift region 111 between the source region and the drain region. The low-doped drift region is high resistance, capable of withstanding higher voltages such as figure 1 As shown, the gate 112 of the LDMOS extends above the oxide layer 113 in the drift region of the drift region, acting as a fie...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L21/823412H01L21/823456H01L21/823807H01L21/82385H01L27/0922H01L21/82H01L27/085H01L21/8238
Inventor 吴孝嘉房世林罗泽煌陈正培章舒何延强
Owner CSMC TECH FAB2 CO LTD
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