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Semiconductor device

A semiconductor and transistor technology, applied in the field of semiconductor devices, can solve the problem of high on-resistance and achieve the effect of reducing on-resistance and increasing avalanche tolerance

Inactive Publication Date: 2013-04-10
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the withstand voltage is designed to be low, there will be a problem of high on-resistance

Method used

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  • Semiconductor device
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Experimental program
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Effect test

no. 1 Embodiment approach ）

[0027] figure 1 A cross-sectional view showing a main part of the semiconductor device 1 according to the first embodiment is shown, figure 2 An equivalent circuit diagram of the semiconductor device 1 is shown.

[0028] A semiconductor device 1 according to the first embodiment includes a MOS 2 (field effect transistor), a first diode 3 , and a second diode 4 . In addition, this semiconductor device 1 is fabricated by appropriately using both ion implantation and epitaxy on a semiconductor substrate. In this embodiment mode, the semiconductor substrate uses n as the first semiconductor layer - type drift layer 20 is shown. In addition, the plurality of p-type column layers 21 to be the second semiconductor layer are changed from n - One surface side of the drift layer 20 extends in the depth direction and is provided at intervals from each other. As a result, p-type column layer 21 and n - The drift layers 20 are periodically adjacent to each other (pn junctions) to fo...

no. 2 Embodiment approach ）

[0048] Figure 4 A cross-sectional view of main parts showing the semiconductor device 1 according to the second embodiment is shown. For each part of the second embodiment, and figure 1 The same parts of the semiconductor device 1 according to the first embodiment shown are denoted by the same reference numerals.

[0049] The semiconductor device 1 of the second embodiment is different from the first embodiment in that a gate electrode 25b leading out the gate electrode 25a is provided on a part of the source electrode 50 provided on the upper portion of the second diode 4, and a The first diode 3 and the second diode 4 are provided.

[0050] The first diode 3 and the second diode 4 are inactive regions where no current flows in the on state of the semiconductor device 1 (MOS 2 ). Generally, the area where the first diode 3 and the second diode 4 are provided is an ineffective area, so as described in this embodiment, by providing the first diode 3 and the second diode 4 o...

no. 3 Embodiment approach ）

[0054] Figure 5 A plan view showing main parts of the semiconductor device 1 according to the third embodiment is shown, Image 6 show that Figure 5 The cross-sectional view of the main part of the X‐A‐X' line, Figure 7 A cross-sectional view of a main part of a semiconductor device 1 showing a modified example of the third embodiment is shown. For each part of the third embodiment and the modified example of the third embodiment, and figure 1 The same parts of the semiconductor device 1 according to the first embodiment shown are denoted by the same reference numerals.

[0055] The semiconductor device 1 of the third embodiment is different from the first and second embodiments in that the interval between the p-type clamp layers 30 is set larger than the interval between the p-type base layers 22 . By adopting such a structure, electric field concentration can be generated on the lower end portion of the p-type clamp layer 30 (upper end portion of the p-type column la...

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PUM

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Abstract

A semiconductor device comprising: a Metal Oxide Semiconductor Field Effect Transistor including: a semiconductor substrate including a first semiconductor layer of a first conductivity type; second semiconductor layers of a second conductivity type extending in a depth direction from one surface of the semiconductor substrate, and having space each other; a first diode including a fifth semiconductor layer of the second conductivity type contacting the second semiconductor layer in one surface side of the semiconductor substrate, the first semiconductor layer and the second semiconductor layers; and an anode of the second diode connected to an anode of the first diode.

Description

[0001] Cross References to Related Applications [0002] This application is based on and benefits from prior Japanese Patent Application No. 2011-215726 filed on September 29, 2011, the entire contents of which are hereby incorporated by reference. technical field [0003] Embodiments relate to semiconductor devices. Background technique [0004] Vertical power MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) are used, for example, in power management circuits or safety circuits for lithium-ion batteries, so low on-resistance, high withstand voltage, low-voltage drive, and reduction of switching loss are required etc. [0005] In addition to the function of switching when a high voltage is applied, the vertical power MOSFET also has the following functions: when an overvoltage is applied, it causes an avalanche breakdown to cause a current to flow, and at the same time clamps the voltage. . This function can prevent insulation damage of surrounding elements. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/06H01L29/78
CPCH01L27/0629H01L27/0727H01L29/0634H01L29/0878H01L29/1095H01L29/407H01L29/42372H01L29/7803H01L29/7804H01L29/7805H01L29/7806H01L29/7808H01L29/7813H01L29/7827H01L29/868H01L29/872
Inventor 斋藤涉小野升太郎仲敏行谷内俊治山下浩明
Owner KK TOSHIBA
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