Preparation method for FS-IGBT device

Abstract

A preparation method for an FS-IGBT (Field Stop-Insulated-Gate Bipolar Transistor) device belongs to the technical field of power semiconductor devices. In the preparation method, N-type impurity injection is performed on a substrate to form a field stop layer, then an epitaxial layer is generated, a front patterning is manufactured, then the back part is thinned, injection and annealing for a P-type collector region on the back part are performed, a manner of metalization on the back part is adopted to manufacture a field stop transistor, and impurities in the field stop layer can be activated fully. In addition, the preparation method can lead in an N-type transition region between the field stop layer and the P-type collector region by controlling thermal budget and back thinning positions, and the performance of the device can be improved.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and relates to an insulated gate bipolar transistor (IGBT), especially a preparation method of a field stop type insulated gate bipolar transistor (FS-IGBT). Background technique [0002] Power semiconductor technology is the core of power electronics technology. With the development of microelectronics technology, modern power semiconductor technology represented by gate-controlled power devices has developed rapidly since the 1980s, which has greatly promoted the progress of power electronics technology. [0003] The power MOS tube is a voltage-controlled device, which can control the switching of the device by controlling the gate voltage. The structure of the driving circuit is simple, and the single-carrier conductivity makes it excellent in switching characteristics. However, multisub devices cannot produce conductance modulation effects in the drift region, so they are ...

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Problems solved by technology

However, this increases the difficulty of the process. At present, the FS layer is usually introduced by doing the front side process first, and then injecting the back sheet. Since the metal pattern on the front side needs to be protected, the annealing temperature should not be too high. At this time, the impurity activation rate is very low, which affects Device performance

Some manufacturers use laser annealing to solve this problem. Although this advanced process technology can solve the problem of low impurity activation rate, it cannot advance the impurity, and due to the limitation of wavelength, the annealing depth is limited. A thinner FS layer is obtained at the back collector area. This FS layer cannot maximize the withstand voltage level of the device. In addition, the thinner FS layer will affect the reliability of the device, and it is easy to generate oscillation when it is turned off.

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