Preparation method for back-contact crystalline silicon solar cell based on plasma etching technology
A back-contact, solar cell technology, applied in the field of solar cells, can solve the problems of large investment in the industrialization of lithography opening, influence of reliability and stability, and low opening accuracy, so as to facilitate industrial production and high conversion efficiency. , to ensure the effect of passivation performance
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Embodiment 1
[0046] Step 1: Put the silicon wafer substrate 1 into a high-temperature diffusion furnace, 3 As a phosphorus source, an n-type layer 2 is formed on both sides of the silicon wafer through high-temperature diffusion doping with phosphorus, and the sheet resistance of the n-type layer 2 is 40-50Ω / □.
[0047] Step 2: Using HF / HNO 3 The mixed solution removes the n-type layer 2 on the back side of the silicon wafer substrate 1 through a single-side etching device, wherein the concentration of the HF solution is 49%, and the HNO 3 Solution concentration is 69%, HF solution and HNO 3 The solution volume ratio is 1:3;
[0048] Step 3: Put the silicon wafer substrate 1 into an oxidation furnace, and dry thermal oxidation on both sides of the silicon wafer substrate 1 at high temperature to form a thermal oxidation layer 3, the thermal oxidation layer 3 is a silicon dioxide layer, and The thickness is 5-15nm.
[0049] Step 4: Coating a layer of silicon nitride (SiNx:H) on the back...
Embodiment 2
[0058] Step 1: Put the silicon wafer substrate 1 into a high-temperature diffusion furnace, 3 As a phosphorus source, an n-type layer 2 is formed on both sides of the silicon wafer through high-temperature diffusion doping with phosphorus, and the sheet resistance of the n-type layer 2 is 50-60Ω / □.
[0059] Step 2: using KOH solution to remove the n-type layer 2 on the back side of the silicon wafer substrate 1 through single-side etching equipment, wherein the concentration of the KOH solution is 20%;
[0060] Step 3: Put the silicon wafer substrate 1 into an oxidation furnace, and form a thermal oxidation layer 3 by dry thermal oxidation on both sides of the silicon wafer substrate 1 at high temperature. The thermal oxidation layer 3 is a silicon dioxide layer with a thickness of 35~50nm.
[0061] Step 4: Coating a layer of silicon nitride (SiNx:H) on the back of the silicon wafer substrate 1 by PECVD equipment to form a back silicon nitride layer 4, and the back silicon ni...
Embodiment 3
[0070] Step 1: Put the silicon wafer substrate 1 into a high-temperature diffusion furnace, 3 As a phosphorus source, the n-type layer 2 is formed on both sides of the silicon wafer through high-temperature diffusion and doping of phosphorus, and the sheet resistance of the n-type layer 2 is 60-70Ω / □.
[0071] Step 2: using NaOH solution to remove the n-type layer 2 on the back side of the silicon wafer substrate 1 through single-side etching equipment, wherein the concentration of the KOH solution is 20%;
[0072] Step 3: put the silicon wafer substrate into an oxidation furnace, dry thermal oxidation on both sides of the silicon wafer substrate 1 at high temperature to form a thermal oxide layer 3 with a thickness of 15-30 nm.
[0073] Step 4: Coating a layer of silicon nitride (SiNx:H) on the back of the silicon wafer substrate 1 by PECVD equipment to form a back silicon nitride layer 4, and the back silicon nitride layer 4 and the silicon dioxide layer form a silicon dioxi...
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