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Eight-tube storage unit capable of automatically adjusting strength of transmission tube and strength of pull-down tube

A storage unit and automatic adjustment technology, which is applied in the direction of information storage, static memory, digital memory information, etc., can solve problems such as singleness and sacrifice of SRAM performance, and achieve the effects of improving stability, saving area, and increasing static noise tolerance

Inactive Publication Date: 2012-02-22
HUNAN LUGU FEITENG MICROELECTRONICS
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But these are only to improve the static noise margin of reading or writing, and need to add additional reading and writing auxiliary circuits, at the expense of SRAM performance

Method used

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  • Eight-tube storage unit capable of automatically adjusting strength of transmission tube and strength of pull-down tube
  • Eight-tube storage unit capable of automatically adjusting strength of transmission tube and strength of pull-down tube
  • Eight-tube storage unit capable of automatically adjusting strength of transmission tube and strength of pull-down tube

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Embodiment Construction

[0019] The circuit structure and working process of the 8-tube storage unit that automatically adjusts the strength of the transfer tube and the pull-down tube will be described in detail below in conjunction with the accompanying drawings.

[0020] figure 1 It is the circuit structure of the 8-pipe storage unit of the present invention. Based on the 6-tube storage unit structure, add two NMOS tubes that can adjust the strength of the transmission tube and the pull-down tube. Pull-up PMOS transistors P1 and P2, pull-down NMOS transistors N1 and N2, and transmission NMOS transistors N5 and N6 form a standard 6-tube memory unit, WL is the read and write word line of the memory unit, and BL and BLB are a pair of complementary bit lines. The NMOS transistor N3 and the NMOS transistor N4 are two additional transistors, wherein the gate of the NMOS transistor N3 is connected to the data storage node QB, the drain is connected to the data storage node Q, and the source is connected ...

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Abstract

The invention discloses an eight-tube storage unit capable of automatically adjusting the strength of a transmission tube and the strength of a pull-down tube. Two NMOS (non-channel metal oxide semiconductor) tubes capable of adjusting the strength of the transmission tube and the strength of the pull-down tube are added on the basis of a standard six-tube storage unit so as to realize the eight-tube storage unit which is capable of automatically adjusting the strength of the transmission tube and the strength of the pull-down tube according to types of reading and writing operation. When the storage unit is used for writing operation, the strength of the transmission tube is strengthened, writing noise margin of the storage unit is increased, and the speed of writing operation is increased. When the storage unit is used for reading operation, the strength of the pull-down tube is strengthened, reading noise margin of the storage unit is increased, and simultaneously, the speed of data reading operation is increased. The eight-tube storage unit has the advantages of high static noise margin, fine stability, fast reading and writing speeds and the like.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, and specifically relates to a static random access memory (Static Random Access Memory, SRAM) under a nanoscale CMOS process. Background technique [0002] As the demand for large-capacity on-chip memory continues to increase, in microprocessors and SoC chips, memory accounts for an increasing proportion of chip area. According to ITRS forecasts, memory will account for more than 90% of the entire chip area by 2013. SRAM is the most important class of on-chip memory implementation technologies. The storage unit is the core of SRAM, which directly determines the performance and storage density of SRAM. The 6-tube memory unit is widely used in the design of SRAM because of its small number of transistors and small area. [0003] However, with the shrinking process size, 6-tube SRAM is facing many severe technical challenges. First, process jitter causes variations in device process pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/4197
Inventor 温亮李振涛徐庆光郭阳陈书明张家胜刘详远唐涛
Owner HUNAN LUGU FEITENG MICROELECTRONICS
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