Array substrate and manufacturing method thereof and liquid crystal display

Abstract

The invention discloses an array substrate and a manufacturing method thereof and a liquid crystal display. In the array substrate, an additional electrode is formed above a grid line, the additional electrode and the grid line are mutually spaced by virtue of a grid insulating layer, and the additional electrode is electrically connected with a public electrode wire; a pattern of a pixel electrode extends to the upward side of the additional electrode to be overlapped with the additional electrode, and overlapped parts of the pixel electrode, the additional electrode and the public electrodewire form a storage capacitor. According to the invention, two forms of a grid line-based storage capacitor and a public electrode wire-based storage capacitor are combined, storage capacitance can be improved, and influence of the storage capacitor on other display factors is reduced, aperture opening ratio is not reduced as an overlarge public electrode wire area is required, resistance-capacitance delay is shorter, and better display quality can be obtained.

Description

technical field [0001] The invention relates to liquid crystal display technology, in particular to an array substrate, a manufacturing method thereof and a liquid crystal display. Background technique [0002] A liquid crystal display is a commonly used flat panel display at present, and a thin film transistor liquid crystal display (ThinFilm Transistor Liquid Crystal Display, TFT-LCD for short) is a mainstream product in the liquid crystal display. [0003] The liquid crystal panel is an important part of TFT-LCD, and generally includes an array substrate and a color filter substrate arranged in opposite cells, and a liquid crystal layer is filled between them. Figure 1A is a partial top view structural schematic diagram of an existing array substrate, Figure 1B for Figure 1A Schematic diagram of the cut-away structure in side view along line A-A. Such as Figure 1A and 1B As shown, the array substrate includes a base substrate 1; the base substrate 1 is formed with d...

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Problems solved by technology

[0006] However, the formation of these two storage capacitors has certain defects: based on the storage capacitor of the gate line, there is a large parasitic capacitance between the pixel electrode and the gate line, resulting in a relatively large resistance-capacitance delay (RC Delay), which will affect the image signal. Transmission; based on the storage capacitance of the common electrode line, in order to achieve a certain capacitance value, it must ensure that there is a large enough overlapping area, and the opaque common electrode line will reduce the light-transmitting area in the pixel unit, so the pixel unit The opening ratio of the

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