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Large-area organic thin film transistor array preparation method compatible with roll-to-roll technology

A large-area, organic film technology, used in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve the problem of easy reaction and mutual mixing, unguaranteed interface quality, and difficulty in preparing large-area organic films with uniform thickness. Small molecule thin film and other problems, to achieve the effect of economical and efficient use of raw materials, uniform device performance, and excellent device indicators

Inactive Publication Date: 2011-10-05
THE NAT CENT FOR NANOSCI & TECH NCNST OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, although the solution method is simple and low-cost, for organic thin film-based transistors with complex structures, the solvent and the prepared organic semiconductor materials are prone to react and mix; at the same time, when the solution method prepares a multilayer film structure, the interface quality is improved. Not guaranteed, which restricts the application of solution film-forming method
For the traditional vacuum thermal evaporation method, due to the limitation of evaporation equipment, the position of the substrate is affected by factors such as the position of the evaporation source, the size of the evaporation source, and the distance from the evaporation source, making it difficult to prepare large-area organic small molecule films with uniform thickness and high quality.
The current commercialized equipment cannot provide methods and means for preparing large-area organic thin films and device arrays by vacuum hot-plating

Method used

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  • Large-area organic thin film transistor array preparation method compatible with roll-to-roll technology
  • Large-area organic thin film transistor array preparation method compatible with roll-to-roll technology
  • Large-area organic thin film transistor array preparation method compatible with roll-to-roll technology

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Effect test

Embodiment 1

[0034] refer to image 3 In this embodiment, clean PET (polyethylene terephthalate) plated with ITO (indium tin oxide) is used as the substrate, and the substrate also serves as the gate electrode.

[0035] Prepare a polystyrene insulating dielectric layer on the gate electrode: spin-coat a polystyrene insulating dielectric layer (toluene solution, mass concentration 5%, rotating speed 2000rpm / min) on the upper surface of the substrate, and bake for 3 hours at 80°C , the thickness of the polystyrene insulating dielectric layer is about 500nm.

[0036] Fabrication of pentacene thin films on polystyrene insulating dielectric layers: using figure 1 In the vacuum coating system shown, the lower surface of the substrate prepared sequentially with the gate electrode and the polystyrene insulating dielectric layer is pasted on the roller, and the vacuum degree is 1.2×10 -3 Under the conditions of Pa and room temperature, pentacene was deposited on the polystyrene insulating dielect...

Embodiment 2

[0044] refer to image 3 In this embodiment, an n-type heavily doped silicon wafer is used as a substrate, and the substrate is used as a gate at the same time; the n-type heavily doped silicon wafer (substrate) is cut into 15 mm × 15 mm flake-like small pieces, and carried out cleaning;

[0045] Prepare an insulating dielectric layer on the upper surface of the n-type heavily doped silicon wafer substrate: spin-coat a polystyrene dielectric layer (toluene solution, mass concentration 5%, rotating speed 2000rpm / min) on the upper surface of the substrate, bake at 80 ° C Baking for 3 hours, the thickness of the polystyrene insulating dielectric layer is about 500nm.

[0046] Fabrication of Pentacene Films on Polystyrene Insulating Dielectric Layers: Using figure 1 In the vacuum coating system shown, the lower surface of the substrate prepared sequentially with the gate electrode and the polystyrene insulating dielectric layer is pasted on the roller, and the vacuum degree is 9...

Embodiment 3

[0054] refer to image 3 , first make a gate electrode on the upper surface of the substrate. In this embodiment, an n-type heavily doped silicon wafer is used as the substrate and at the same time as the gate; a silicon dioxide dielectric layer (using thermally oxidized silicon dioxide Dielectric layer, thickness 290nm).

[0055] The substrate prepared with the silicon dioxide insulating dielectric layer was cut into small pieces of 10mm×10mm, and the surface was cleaned.

[0056] The lower surface of the substrate prepared with a silicon dioxide insulating dielectric layer is pressed Figure 5 Way to paste on the roller; use figure 1 The vacuum coating system shown in the vacuum degree is 9×10 -4 Pa and room temperature conditions, use the vacuum thermal evaporation method to vapor-deposit hexathiophene on the silicon dioxide insulating dielectric layer for 70min, and prepare the hexathiophene film;

[0057] During the evaporation process of the hexathiophene film, the r...

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Abstract

The invention relates to a large-area organic thin film transistor array preparation method compatible with a roll-to-roll technology. The method comprises a step of: manufacturing a grid, an insulation dielectric layer, an organic small-molecule membrane, a source and a drain on a substrate sequentially; the substep of preparing the organic small-molecule membrane on the insulation dielectric layer is performed by: bonding the lower surface of the substrate onto a vacuum evaporation system roller; and evaporating an organic small-molecule material on the insulation dielectric layer by a vacuum evaporation method under the conditions of a vacuum degree of 1*10<-3>-5*10<-5>Pa and a room temperature environment for 10 to 100 minutes, and preparing the organic small-molecule membrane, wherein the organic small-molecule material comprises acene, copper phthalocyanines and derivatives, thiophene oligomer and a derivative, and a tetrathiafulvalene derivative; and during evaporation of the organic small-molecule material, the roller does rotation motion and translation motion at the same time. The method is simple; a transistor device with high performance index and high mobility can be obtained; furthermore, the utilization efficiency of the raw material and the performance uniformity of the transistor device are high.

Description

technical field [0001] The invention relates to the field of vacuum evaporation organic small molecule film growth and the preparation method of organic electronic devices, in particular to a method for preparing a large-area and highly uniform organic thin film transistor array on a flexible substrate, such as being applied to organic displays, sensors and In fields such as radio frequency identification tags, the main technical indicators of each device, such as mobility and threshold voltage, and the uniformity of each device can meet commercial requirements. Background technique [0002] The basic structure and function of the organic thin film transistor are basically the same as the traditional inorganic thin film transistor, the difference is that it uses an organic semiconductor as the active layer of the device. Compared with the existing amorphous silicon or polysilicon thin film transistors, organic thin film transistors have the following characteristics: (1) The...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/77H01L51/40
Inventor 王良民江潮李德兴
Owner THE NAT CENT FOR NANOSCI & TECH NCNST OF CHINA
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