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Control cycle synchronizer of triple-modular redundancy fault-tolerant computer

A technology of control cycle, redundancy and fault tolerance, the redundancy applied in hardware is used for data error detection, response error generation, etc., to achieve the effect of reducing hardware scale, strong fault tolerance, and simple design

Active Publication Date: 2012-08-22
BEIJING INST OF CONTROL ENG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The present invention solves the problem of the fault-tolerant ability of the control cycle synchronization and the complex design of the existing centralized control cycle synchronization circuit

Method used

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  • Control cycle synchronizer of triple-modular redundancy fault-tolerant computer
  • Control cycle synchronizer of triple-modular redundancy fault-tolerant computer
  • Control cycle synchronizer of triple-modular redundancy fault-tolerant computer

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Embodiment

[0043] During specific implementation, the voting in the voting circuit among the present invention is as follows image 3As shown, it is composed of NPN transistor and resistor. Among them, In1 and In2 are the input terminals of the voting unit, and the input terminals are respectively connected to the bases of the two triodes through two 1K ohm resistors R1 and R2 to receive the input signals of the two clocks; the collector of Q1 passes through A 10K ohm resistor R5 is connected to the power supply, the emitter of the transistor Q1 is directly connected to the collector of Q2, and the emitter of Q2 is directly grounded.

[0044] Take the on-board triple-mode redundant control computer as an example. Assuming that the control cycle is 100ms, clk_pos and clk_neg can be set to 20ms and 80ms respectively; assuming that the device deviation factor will cause the maximum clock offset max(max(pos_a), max(pos_b), max(pos_c))-clk_pos is 10ms, then it can be set to 20ms according t...

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PUM

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Abstract

The invention relates to a control cycle synchronizer of a triple-modular redundancy fault-tolerant computer, which comprises single machines A, B and C, a voting circuit and control cycle interruption management modules arranged in the A, B and C, wherein the single machines A, B and C simultaneously input respective control cycle clocks to the voting circuit; the voting circuit uses an internalvoting unit and wired-and logic to carry out a 2-out-of-3 vote on the input control cycles so as to produce a unified control cycle clock; the single machines A, B and C use the unified control cycleclock to response to control cycle interruption; and the control cycle interruption management modules turn off the control cycle interruption after the control cycle interruption is started, and turn on the control cycle interruption of the single machines A, B and C again after a certain time delay. By using the simple circuit design scheme, in the invention, the high-reliability control cycle synchronization control on the triple-modular redundancy fault-tolerant computer is realized, and all simplex fault modes including normally-0 or normally-1 faults as well as clock drift faults (including high-frequency oscillation and frequency downshift) can be tolerated.

Description

technical field [0001] The invention relates to a control cycle synchronization device for a triple-mode redundant fault-tolerant computer, which is particularly suitable for synchronizing the control cycle of a triple-mode redundant fault-tolerant computer based on task-level synchronization. Background technique [0002] In the task-level synchronous triple-mode redundant fault-tolerant computer, the control cycle is used to generate synchronous interrupts so that the three backup computers can perform the same task synchronously, including three-machine synchronous exchange, data comparison and other operations. The control cycle synchronization is the triple-mode redundant Key technologies in fault-tolerant computers. [0003] The current three-mode redundant fault-tolerant computer control cycle synchronization basically adopts a centralized control cycle synchronization method, that is, a centralized control cycle synchronization source, for example: [0004] The con...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/18
Inventor 冯彦君李任欣乔磊范立明杨桦华更新
Owner BEIJING INST OF CONTROL ENG
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