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Production method of groove-type power semiconductor with low grid charge and structure thereof

A technology for power semiconductors and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, circuits, etc., can solve problems such as limited bottom area, and achieve the effect of reducing switching loss, reducing overlapping area, and improving switching speed

Inactive Publication Date: 2010-09-29
NIKO SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, under the conventional MOSFET structure, the gate-to-drain capacitance (Cgd) is limited by the bottom area of ​​the trench, which easily leads to high switching losses under high-frequency operation.

Method used

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  • Production method of groove-type power semiconductor with low grid charge and structure thereof
  • Production method of groove-type power semiconductor with low grid charge and structure thereof
  • Production method of groove-type power semiconductor with low grid charge and structure thereof

Examples

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no. 1 example

[0040] The invention provides a method for manufacturing a low gate charge trench power semiconductor and its structure. The method utilizes a polysilicon spacer to reduce the overlapping area (overlap) between the polysilicon and the bottom of the trench, and cooperates with a low The role of the metal silicide with high resistivity to achieve the effect of reducing the gate-drain capacitance (Cgd) and reducing the resistance, thereby reducing the switching loss. see Figure 1A to Figure 1M , which is the first embodiment of the manufacturing method of the present invention, comprising the following steps:

[0041] First, if Figure 1A As shown, a first conductive type semiconductor substrate 100 is provided, and a first conductive type epitaxial layer 102 is formed on the first conductive type semiconductor substrate 100, and a second conductive type body region 104 is implanted and Diffusion process is formed on the upper portion of the first conductivity type epitaxial la...

no. 2 example

[0055] Please refer to Figure 2A to Figure 2I , which is a second embodiment of the present invention, which includes the following steps:

[0056] Figure 2A to Figure 2D The steps are the same as those in the first embodiment, so the following will focus on Figure 1A to Figure 1D Make a simple explanation.

[0057] First, if Figure 2A As shown, a first conductive type semiconductor substrate 200 is provided, and a first conductive type epitaxial layer 202 is formed on the first conductive type semiconductor substrate 200, and a second conductive type body region 204 is formed by ion implantation It is formed on the upper part of the epitaxial layer 202 of the first conductivity type by a diffusion process, and the related ion doping concentration can refer to the above description.

[0058] Subsequently, if Figure 2B As shown, a plurality of trenches 201 are formed in the epitaxial layer 202 of the first conductivity type, and each trench 201 penetrates the body reg...

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Abstract

The invention discloses a production method of a groove-type power semiconductor with a low grid charge and a structure thereof. The production method is characterized by comprising the following steps of: providing a first conductive type semiconductor substrate and forming a first conductive epitaxial layer and a second conductive type body area on the first conductive type semiconductor substrate; and forming a plurality of grooves; forming a first insulating layer on the second conductive type body area and on the lateral surface of each groove; forming a polysilicon side wall on the sidewall of each groove and exposing one part of the bottom surface of the groove; filling a dielectric structure into each groove; filling polysilicon above the dielectric structure of each groove; forming a metallic silicide on the polysilicon, wherein the metallic silicide is a first phase composition; and converting the metallic silicide from the first phase composition into a second phase composition. The invention can improve the switching speed and achieve the effect of reducing the switching loss.

Description

technical field [0001] The invention relates to a method for manufacturing a trench type power semiconductor with low gate charge and its structure, in particular to a method for manufacturing a trench type power semiconductor capable of increasing the switching speed of the power semiconductor and its structure. Background technique [0002] Trench metal-oxide-semiconductor (MOS) devices include a gate in a trench that extends downward from the surface of a semiconductor substrate (such as silicon), and can be fabricated by etching or the like. of the groove. The current flowing in these trench metal-oxide-semiconductor devices is mainly in the vertical direction, therefore, each device can be integrated and packaged more densely. Common metal oxide semiconductor devices include metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and thyristors. [0003] Improvement in switching performance of switching elements is one...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8234H01L21/336H01L21/28H01L27/088H01L29/78H01L29/423
Inventor 许修文倪君伟涂高维
Owner NIKO SEMICON
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