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Method and system for driving accidental validation integrated circuit by coverage rate

A random verification, integrated circuit technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of efficiency difference, average performance blindness, etc.

Active Publication Date: 2009-07-22
LOONGSON TECH CORP
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  • Abstract
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Problems solved by technology

However, because it is essentially a general search algorithm, if the specific domain knowledge of the problem to be solved is not used, the performance of the algorithm will have little to do with the encoding method, mutation operator, population size and selection mechanism. will result in an average performance equal to that of a blind random search
For example, in the case of other designs being the same, the goal that can be achieved by using binary encoding for interleaving operations can also be achieved by using octal, hexadecimal or even eleven, but there may be differences in efficiency

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  • Method and system for driving accidental validation integrated circuit by coverage rate
  • Method and system for driving accidental validation integrated circuit by coverage rate
  • Method and system for driving accidental validation integrated circuit by coverage rate

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Embodiment Construction

[0110] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0111] Such as figure 2 As shown, the coverage-driven random verification method of the present invention is applied to the specific implementation of the microprocessor, including the following steps:

[0112] Step S201, determine the encoding method corresponding to the Directives (for the random verification at the instruction level of the microprocessor, corresponding to the instruction template file) of the CRPG (configurable random verification platform).

[0113] Determine the representation of the problem. The solution of the current problem is the instruction template file of the CRPG platform. In order to find a better solution that can improve the coverage rate through the genetic algorithm, the instruction template file needs to be encoded first.

[0114] The constraint types contained in the directive template file are shown in the table below....

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Abstract

The invention relates to a method and a system of a coverage-driven random verification of an integrated circuit; the method comprises the following steps: step 1, an initial species group is generated, and the current species group is initialized as the initial species group; step 2, a verifying procedure is generated according to the current species group, and the verifying procedure is executed by an instruction set simulator and a to-be-verified design, whether the to-be-verified design is accurate is determined by comparing two executing results, and a coverage rate report is obtained at the same time; step 3, individual adaptability of the current species group is calculated according to the coverage rate report, and whether the current species group meets optimization criteria is judged according to the adaptability, if yes, the verification is finished, if not, the step four is executed; step 4, an excellent individual in the current species group is chose as a father individual according to the adaptability, and an intersect object of the father individual is chose for carrying out intersection operation to generate a new individual which is composed of a next species group, and the current species group is updated into the next species group, and the step 2 is carried out. The method and the system can automatically optimize the verifying procedure.

Description

technical field [0001] The invention relates to the field of design verification, in particular to a method and system for randomly verifying integrated circuits driven by coverage. Background technique [0002] Functional verification is considered to be the bottleneck in the current hardware design process. In fact, in the entire design process, about 70% of the time and resources are spent on functional verification. Finding as many errors as possible has always been the focus of attention in the field of verification. The current main verification methods are simulation verification and formal verification. Among them, simulation verification is the main verification method in industrial applications, especially for large and complex designs, such as microprocessors. Compared with it, formal verification can provide the correctness proof of the verification object, but due to Due to the existence of problems such as "explosion", its application range is limited. Just ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50G06N3/12
Inventor 郭崎沈海华卫文丽
Owner LOONGSON TECH CORP
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