Sensitive amplifier used for EEPROM and read circuit constituted of the same

A sensitive amplifier and circuit technology, which is applied in the application field of embedded EEPROM, can solve problems such as EEPROM SoC performance bottlenecks, and achieve the effects of avoiding interference charges, low static power consumption, and ensuring stability

Inactive Publication Date: 2008-07-16
HUAZHONG UNIV OF SCI & TECH
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] With the improvement of the operating frequency of the current SoC chip, an embedded EEPROM with high readout speed is also required to adapt to it, otherwise the EEPROM may become the bottleneck of the entire SoC performance

Method used

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  • Sensitive amplifier used for EEPROM and read circuit constituted of the same
  • Sensitive amplifier used for EEPROM and read circuit constituted of the same
  • Sensitive amplifier used for EEPROM and read circuit constituted of the same

Examples

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example

[0040] The description of this example is based on the circuit design based on the SMIC (SMIC) 0.35μm process with embedded EEPROM. The process library defines that the threshold voltage of the floating gate tube MC tube storing "1" information is 4V, and the threshold voltage of the floating gate tube MC tube storing "0" information is -1V. The working voltage VCC of the whole EEPROM=3V.

[0041] When the circuit is working, the voltages applied to CG and SG are 1.5V and 3V respectively. After charging to BL, if the floating gate tube MC stores "0" information, the floating gate tube MC is turned on, and the bit of the selected memory block The capacitance of the line is much larger than the capacitance of the unselected memory block, and the readout signal of "0" is obtained at the output terminal; if the floating gate tube MC tube stores "1" information, the floating gate tube MC tube does not conduct the bit lines of the memory blocks on both sides The capacitance is basica...

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Abstract

The invention discloses a sensitive amplifier for an EEPROM and a read circuit consisting of the sensitive amplifier. The sensitive amplifier for the EEPROM provided by the invention comprises a charge control circuit, a detection circuit and an output maintaining and shaping circuit, wherein, the charge control circuit consists of two same charge control sub-circuits; the detection circuit has a XNOR gate; the output maintaining and shaping circuit maintains the output of the detection circuit and shapes the output into a standard digital level. The read circuit formed by the sensitive amplifier comprises a first memory module and a second memory module which are completely symmetrical, two bit lines of each sensitive amplifier are respectively switched to corresponding bit lines of the first memory module and the second memory module. The sensitive amplifier has a circuit with simple structure, small occupied area, high read speed, low dynamic power, wide range of operation voltage and almost-zero static power and does not need a biasing circuit; the read circuit formed by the sensitive amplifier has the characteristics of anti-degradation of the properties of elements and stable performance.

Description

technical field [0001] The invention belongs to the technical field of non-volatile memory, in particular to a sensitive amplifier for EEPROM and a read circuit composed of it, especially suitable for application in embedded EEPROM. Background technique [0002] EEPROM memory is widely used because it not only has the characteristics that RAM can rewrite the stored content at any time, but also has the characteristic that ROM can keep the stored content for a long time under the condition of power failure. Especially in the current situation where SoC (System on Chip) is widely used, EEPROM is used as an embedded memory to store configuration information to realize the online configurable feature of the system, and has a wide range of applications. [0003] The entire EEPROM is composed of two parts: memory array and peripheral circuit. The peripheral circuit is composed of column decoder, row decoder, sense amplifier, high voltage generator and logic control (control logic...

Claims

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Application Information

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IPC IPC(8): G11C16/26
Inventor 邹雪城刘政林刘冬生余琼谭波惠雪梅李玲刘旭
Owner HUAZHONG UNIV OF SCI & TECH
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