Nonvolatile semiconductor storage device and method for manufacturing the same

一种非易失性、存储器件的技术，应用在半导体/固态器件制造、半导体器件、静态存储器等方向，能够解决不能抑制寄生晶体管、不能形成等问题，达到有利电荷保持特性的效果

Inactive Publication Date: 2013-09-11
SEMICON ENERGY LAB CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the case of using an SOI substrate, if the thickness of the semiconductor layer is made large, there is a problem: the parasitic transistor between the source region and the drain region cannot be suppressed, so a completely depleted layer type TFT cannot be formed

Method used

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  • Nonvolatile semiconductor storage device and method for manufacturing the same
  • Nonvolatile semiconductor storage device and method for manufacturing the same
  • Nonvolatile semiconductor storage device and method for manufacturing the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0051] figure 1 The sectional view of is illustrating the main structure of the nonvolatile semiconductor memory device related to the present invention. figure 1 In particular, the main part of the non-volatile storage element is illustrated.

[0052] exist figure 1 Among them, reference numeral 10 denotes a substrate, 12 is a base insulating film, 14 is a semiconductor layer, 29 is a channel formation region, 18a and 18b are source regions or drain regions, and 16 is a first insulating film (also referred to as a tunnel insulating film). film), 20 is a floating gate electrode, 22 is a second insulating film (also called a control insulating film), 24 is a control gate electrode, 26a and 26b are conductive layers, 28a and 28b are electrically connected to the The source or drain electrodes of the source or drain regions 18a and 18b, 28c is a gate wiring electrically connected to the control gate electrode, and 27 is an insulating film for passivation.

[0053] exist f...

Embodiment approach 2

[0106] In this embodiment, structures different from figure 1 The structure of the nonvolatile memory element is shown in the method of manufacturing the nonvolatile memory element. In this embodiment, it will be described as Figure 11 The nonvolatile storage element shown. exist Figure 11 In the nonvolatile memory element shown, the control gate electrode 24 has sidewalls 300 .

[0107] exist Figure 11 12, a base insulating film; 14, a semiconductor layer; 29, a channel formation region; 18a and 18b, a source region or a drain region; 16, a first insulating film (also called a tunnel insulating film). 20 is a floating gate electrode; 22 is a second insulating film (also called a control insulating film); 24 is a control gate electrode; 300 is a side wall; 26a and 26b are conductive layers; 28a and 28b are through conductive layer 26a and 26b are connected to source or drain electrodes of the source or drain regions 18a and 18b; 28c is a gate wiring electrically conne...

Embodiment approach 3

[0122] In this embodiment, the combined Figure 14A and 14B , Figures 15A to 15D as well as Figure 16A and 16B Description is different from figure 1 and 11 The structure of the nonvolatile memory shown in the structure.

[0123] exist Figure 14A In the shown nonvolatile memory element, first impurity regions (source or drain regions) 306a and 306b, second impurity regions 307a and 307b, etc. are provided in the semiconductor layer 14, and the floating gate electrode 20 is composed of the first floating gate electrode 20a and second floating gate electrode 20b are formed, which are different from figure 1 and Figure 11 place of the structure shown.

[0124] in such as Figure 14A In the shown structure, a base insulating film 12 is formed on a substrate 10, and a semiconductor layer 14 having first impurity regions 306a and 306b, second impurity regions 307a and 307b, and a channel formation region 29 is formed on the base insulating film 12. . The first insu...

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PUM

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Abstract

It is an object to provide a nonvolatile semiconductor storage device that prevents increase in a contact resistance value due to etching of a semiconductor layer when etching an interlayer insulating film and that has superiority in a writing characteristic and an electric charge-holding characteristic, and a manufacturing method thereof. A conductive layer is provided between a source or drain region and a source or drain wiring. The conductive layer is made of the same conductive layer that forms a control gate electrode. An insulating film is provided so as to cover the conductive layer, and the insulating film has a contact hole for exposing part of the conductive layer. The source or drain wiring is formed so that the contact hole is filled.

Description

technical field [0001] The present invention relates to a nonvolatile semiconductor memory device capable of electrical writing, reading and erasing, and a manufacturing method thereof. Background technique [0002] The market for non-volatile memory is expanding. In a nonvolatile memory, data can be rewritten electrically, and data can be retained even after power is turned off. There is a feature that a nonvolatile memory has a structure similar to a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), providing a region capable of accumulating charge for a long period of time on a channel formation region. The charge accumulation region of a nonvolatile memory is also called a floating gate because it is formed on an insulating layer and is insulated from the surroundings. A control gate is provided on the floating gate via an insulating layer (for example, Patent Document 1 and Patent Document 2: Japanese Patent Application Laid-Open Nos. H5-189984 and No. H6-61...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/115H01L27/12H01L29/788H01L29/40H01L21/8247H01L21/84H01L21/336H01L21/28
CPCG11C16/0483H01L29/7881H01L27/12H01L21/84H01L27/115H01L2924/0002H10B69/00H01L2924/00H10B41/30
Inventor 浅见良信
Owner SEMICON ENERGY LAB CO LTD
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