Semiconductor device

Abstract

The invention provides a semiconductor device. The semiconductor device forms a silicide on a protection ring for latch prevention, and avoids the protection ring from being damaged by an ESD surge. As a solving means, the semiconductor device has a structure that, a silicide with a width (W3) is not formed on a surface of a second protection ring for latch prevention, and at a side facing a transistor forming region (20).

Description

technical field [0001] The present invention relates to techniques for preventing electrostatic breakdown in semiconductor devices. Background technique [0002] Generally, an ESD protection circuit is installed in a semiconductor device so as not to be destroyed by an electrostatic (ESD: electrostatic discharge) surge (surge) input from the outside through an input terminal (or an output terminal). FIG. 1 shows an example of a semiconductor device in which this ESD protection circuit is mounted. [0003] FIG. 1 is a circuit diagram of a conventional semiconductor device (input / output circuit) equipped with an ESD protection circuit. The semiconductor device shown in FIG. 1 has: a CMOS output circuit 600 (output transistors Q10, Q20, current limiting resistor R1, inverter INV1) that receives a gate control signal; and a protection transistor that utilizes a springback action generated by a parasitic bipolar (Q30, Q40, Q50). [0004] In this semiconductor device, when a ne...

AI Technical Summary

Problems solved by technology

In FIG. 5, if the parasitic bipolar transistor Q50 is partially turned on by the surge current, since the silicide is low resistance, the surge current from the power supply terminal VDD partially flows through the path CP4, and the result is a surge current easy local concentration

In particular, the current is concentrated near the collector of the parasitic bipolar transistor Q50, thereby destroying the PN junction

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