Fabricating method for semiconductor device

Abstract

A manufacture method for a semiconductor apparatus includes the following steps of: providing a semiconductor underlay with a first area and a second area; forming polysilicon layers on the semiconductor underlay; reducing the thickness of the polysilicon layer of the second area to lead the thickness of the polysilicon layer of the second area to be less than that of the first area; patterning the polysilicon layers of the first area and the second area; forming a first grid in the first area and forming a second grid in the second area. The technique of manufacturing the grids with different thicknesses of the method is simpler.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method of a semiconductor device. Background technique [0002] Complementary Metal-Oxide-Semiconductor (CMOS) devices are widely used in storage, communication, computer and other fields due to their low power consumption, high response rate and other characteristics. CMOS devices include NMOS transistors and PMOS transistors, and gate materials of the NMOS transistors and PMOS transistors are usually N-type doped or P-type doped polysilicon. Figure 1 to Figure 4 It is a schematic cross-sectional view of a structure corresponding to each step of an existing manufacturing method of a CMOS device. [0003] Such as figure 1 As shown, a shallow trench isolation 11, a P well 12a and an N well 12b are formed in a semiconductor substrate 10, the P well is used to form the conduction channel of the NMOS transistor, and the N well is used to form th...

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Problems solved by technology

[0013] The above method of etching back polysilicon to reduce the thickness of the PMOS gate to form gates with different thicknesses has a relatively complicated manufacturing process.

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