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Method for manufacturing inlaid structure

A manufacturing method and technology of damascene structure, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as dielectric layer damage, and achieve the effects of maintaining breakdown voltage, reducing damage, and eliminating photoresist residues

Inactive Publication Date: 2009-07-22
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0011] Therefore, the object of the present invention is to provide a kind of manufacturing method of damascene structure, to solve the problem that medium layer damages when removing photoresist in existing damascene structure manufacturing process

Method used

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  • Method for manufacturing inlaid structure
  • Method for manufacturing inlaid structure
  • Method for manufacturing inlaid structure

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Embodiment Construction

[0026] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0027] In the manufacturing process of the mosaic structure of the present invention, the photoresist layer formed on the low dielectric constant dielectric layer is removed by oxygen plasma ashing. The damage to the dielectric layer caused by the ion bombardment during the chemicalization process maintains the breakdown voltage of the dielectric layer, thereby improving the stability of the formed device.

[0028] Figure 6 It is a flowchart of an embodiment of the manufacturing process of the damascene structure of the present invention.

[0029] like Figure 6 As shown, first, a semiconductor substrate is provided, and a conductive layer is formed in the semiconductor substrate ( S100 ). The semiconductor substrate can be polycry...

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Abstract

A manufacturing method for an inlaying structure comprises the following steps: a semiconductor basement is provided; a dielectric layer is formed on the semiconductor basement; a photo resist layer is coated on the dielectric layer in a spinning way and is patterned to form an opening pattern; the part of the dielectric layer at a bottom part of the opening pattern is etched to form an opening in the dielectric layer; the photo resist layer is incinerated and removed through the oxide plasma. The method of the invention can reduce bombardment damage to the dielectric layer caused by ion bombardment when the photo resist layer on the dielectric layer is removed and improve the stability of breakdown voltage and the device.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a damascene structure. Background technique [0002] As the line width of the semiconductor process decreases day by day, the industry chooses copper instead of aluminum as the back-end interconnection material, and correspondingly chooses low dielectric constant material as the insulating material. Since copper is difficult to etch and easy to diffuse, the industry introduces the damascene process. , overcome the disadvantage of being difficult to etch, and introduce a barrier layer to block the diffusion of copper in low dielectric constant materials. The Chinese patent application number 02106882.8 discloses a mosaic process, Figure 1 to Figure 4 It is a schematic cross-sectional view of the manufacturing method of the disclosed damascene process. [0003] like figure 1 As shown, a substrate 100 having a metal wiring layer is ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/311H01L21/768G03F7/36
Inventor 刘乒马擎天赵林林
Owner SEMICON MFG INT (SHANGHAI) CORP
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