Virtual processor methods and apparatus with unified event notification and consumer-produced memory operations

Abstract

The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and / or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and / or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing withing such processor can execute a memory instruction (e.g., and “Empty” or other memory-consumer instruction) that permits the thread to wait on the availability of data generated, e.g., by another thread and to transparently wake up when that other thread makes the data available (e.g, by execution of a “Fill” or other memory-producer instruction).

Description

BACKGOUND OF THE INVENTION [0001] This application is a continuation of, and claims the benefit of priority of, co-pending, U.S. patent application Ser. No. 10 / 449,732, filed May 30, 2003, and entitled “Virtual Processor Methods and Apparatus With Unified Event Notification and Consumer-Produced Memory Operations,” the teaching of which are incorporated herein by reference. The invention pertains to digital data processing and, more particularly, to virtual processor methods and apparatus with unified event notification and consumer-producer memory operations. [0002] There have been three broad phases to computing and applications evolution. First, there was the mainframe and minicomputer phase. This was followed by the personal computer phase. We are now in the embedded processor or “computers in disguise” phase. [0003] Increasingly, embedded processors are being used i n digital televisions, digital video recorders, PDAs, mobile phones, and other appliances to support multi-media ...

AI Technical Summary

Benefits of technology

[0012] Still yet another object is to provide such apparatus and methods which are low-cost, low-power and / or support robust rapid-to-market implementations. SUMMARY

Problems solved by technology

Many of these applications require complex video, audio or other signal processing and must run in real-time, concurrently with one another.

Instead or in addition to the DSPs, special-purpose hardware is often provided to handle dedicated needs that a DSP is unable to handle on a programmable basis, e.g., because the DSP cannot handle multiple activities at once or because the DSP cannot meet needs for a very specialized computational element.

A problem with the prior art systems is hardware design complexity, combined with software complexity in programming and interfacing heterogeneous types of computing elements.

The result often manifests itself in embedded processing subsystems that are underpowered computationally, but that are excessive in size, cost and / or electrical power requirements.

Another problem is that both hardware and software must be re-engineered for every application.

Moreover, prior art systems do not load balance; capacity cannot be transferred from one hardware element to another.

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