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Carrier for double-side polishing apparatus, double-side polishing apparatus using the same, and double-side polishing method

a polishing apparatus and a technology of a polishing device, applied in the direction of grinding drives, lapping machines, manufacturing tools, etc., can solve the problems of excessive polishing of the peripheral portion alone of the semiconductor wafer, affecting so as to reduce the peripheral sag, reduce contamination, and improve the quality of the wafer

Inactive Publication Date: 2009-12-10
SHIN-ETSU HANDOTAI CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a carrier for double-side polishing apparatus that has improved life and reduced contamination due to metal impurity, and a high-quality wafer with reduced peripheral sag and a high flatness can be stably efficiently produced by using this carrier. The carrier has a holding hole in which a semiconductor wafer is held during polishing, and the surface roughness of the carrier is set to 0.14 μm or above in terms of Ra. The use of titanium as the material for the carrier increases the hardness of the carrier and reduces abrasion during polishing, resulting in improved carrier life and reduced frequency of dressing of the polishing pads. The carrier can also have grooves that alleviate resistance undergone by the wafer outer peripheral portion during polishing and reduce the frequency of dressing of the polishing pads. The double-side polishing method using this carrier results in a high-quality wafer with reduced peripheral sag and a high flatness.

Problems solved by technology

When double-side polishing is carried out in this manner, an outer peripheral portion alone of the semiconductor wafer is excessively polished due to, e.g., concentration of a pressure on the outer peripheral portion of the semiconductor wafer or an influence of viscoelasticity of a polishing slurry or polishing pads, and peripheral sag occurs.
There is a problem that this peripheral sag degrades a flatness of the wafer.
However, this method has a defect that the number of steps is increased when the secondary double-side polishing step that remedies the peripheral sag is performed, and a double-side polishing method that can more readily reduce the peripheral sag has been demanded.
However, in the double-side polishing, not only the wafer as a workpiece but also a carrier is in contact with the polishing pads, an effect of dressing of the polishing pad surfaces does not last long, and there is a problem that dressing of the polishing pad surfaces must be frequently carried out by using, e.g., a ceramic plate.
Furthermore, there is also a problem that a life of the carrier itself is short and a cost is increased.

Method used

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  • Carrier for double-side polishing apparatus, double-side polishing apparatus using the same, and double-side polishing method
  • Carrier for double-side polishing apparatus, double-side polishing apparatus using the same, and double-side polishing method
  • Carrier for double-side polishing apparatus, double-side polishing apparatus using the same, and double-side polishing method

Examples

Experimental program
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examples 1 and 2

[0062]A double-side polishing apparatus 11 shown in FIGS. 1 and 2 was prepared. Front and back surfaces of each titanium carrier 10 were roughened by using a diamond pellet in advance. Surface roughness of each carrier surface was measured by using Surf Test SJ-201P manufactured by Mitutoyo, and evaluation was carried out based on JIS B0601-1994. The surface roughness was Ra=0.28 to 0.32 μm (Examples 1 and 2). This carrier 10 was used to perform double-side polishing as follows.

[0063]After performing dressing of polishing pads 14, double-side polishing of each silicon wafer having a diameter of 300 mm was performed. That is, one etched silicon wafer W was set in each of five titanium carriers each having a holding hole 17, an upper turn table 13 was rotated in a clockwise direction whilst a lower turn table 12 was rotated in a counterclockwise direction with a number of revolutions of 20 rpm and a load of 250 g / cm2, and an alkaline solution containing colloidal silica was used as a ...

examples 3 , 4

Examples 3, 4, and 5

[0067]Like Examples 1 and 2, front and back surfaces of each titanium carrier were roughened by using a diamond pellet (Ra=0.28 to 0.32 μm), and then grooves having such a grid-like pattern as described in FIG. 6(a) were formed. A groove width was 1 mm, a groove depth was 2 μm, and a groove interval was 2 mm. Double-side polishing was performed under the same conditions as those of Examples 1 and 2 except that each carrier having such grooves was used.

[0068]Further, a peripheral sag amount of each polished wafer was measured like Examples 1 and 2 (Examples 3, 4, and 5).

[0069]FIG. 8 shows obtained measurement results.

examples 6 and 7

[0070]Double-side polishing and measurement were performed under the same conditions as those of (Examples 3, 4, and 5) except that each titanium carrier having no groove formed thereon and Ra=0.28 to 0.32 μm was used (Examples 6 and 7). FIG. 8 shows obtained measurement results.

[0071]It can be understood from the measurement results of the peripheral sag amount described in FIG. 8 that each wafer according to Examples 3, 4, and 5 has a higher flatness than each wafer according to Examples 6 and 7. In particular, it has been confirmed that the peripheral sag amount according to each of Examples 3, 4, and 5 is far smaller than that according to Examples 6 and 7 and the peripheral sag can be further improved by forming the grooves on the carrier.

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Abstract

The present invention provides a carrier for double-side polishing apparatus which is set between upper and lower turn tables having polishing pads attached thereto and has a holding hole in which a semiconductor wafer sandwiched between the upper and lower turn tables is held at the time of polishing in a double-side polishing apparatus, wherein a material of the carrier is titanium, and surface roughness of the titanium carrier is 0.14 μm or above in terms of Ra. As a result, there can be provided the carrier for double-side polishing apparatus, a double-side polishing apparatus, and a double-side polishing method that can stably and efficiently produce a high-quality wafer having reduced wafer peripheral sag and a high flatness at the time of double-side polishing of a semiconductor wafer.

Description

TECHNICAL FIELD[0001]The present invention relates to a carrier for double-side polishing apparatus that holds a semiconductor wafer when polishing the semiconductor wafer in a double-side polishing apparatus.BACKGROUND ART[0002]When, e.g., polishing both surfaces of a semiconductor wafer, the semiconductor wafer is held by a carrier in conventional examples. This carrier is formed with a thickness thinner than that of the semiconductor wafer and has a wafer holding hole through which the wafer is held at a predetermined position between an upper turn table and a lower turn table of a double-side polishing apparatus. The semiconductor wafer is inserted into and held in this wafer holding hole, upper and lower surfaces of the semiconductor wafer are sandwiched by polishing jig, e.g., polishing pads provided on opposed surfaces of the upper turn table and the lower turn table, and polishing is carried out while supplying a polishing agent to the polishing target surfaces.[0003]When do...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): B24B1/00B24B41/06B24B7/17B24B37/08B24B37/27B24B37/28H01L21/304
CPCB24B37/28H01L21/304
Inventor UCHIYAMA, ISAO
Owner SHIN-ETSU HANDOTAI CO LTD
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