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Synchronization of independent clocks

a clock and clock technology, applied in multiplex communication, generating/distributing signals, instruments, etc., can solve problems such as insufficient performance analysis and visualization, inability to run background processes, and inability to maintain clocks, so as to achieve low runtime overhead and code space requirements

Inactive Publication Date: 2009-06-18
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

Facilitates precise program debugging, performance analysis, and visualization with low runtime overhead and code space requirements, applicable to non-preemptive environments like the Cell processor, and capable of recovering from errors in local time measurements.

Problems solved by technology

A problem arises, when tracing programs that run on a multi-core machine having a plurality of processing cores where clocks on each core are not synchronized.
This absence of consistent time across the processes complicates program debugging, performance analysis, and visualization.
Some cores cannot run background processes.
Therefore, it is not sufficient for performance analysis and visualization.
Therefore, it cannot be used with the cores that cannot run background processes.

Method used

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Examples

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Embodiment Construction

[0023]As an example embodiment in which the present invention is implemented is a multi-core processing system shown in FIG. 1. FIG. 1 shows three processing cores, 130, 140, and 150, executing processes that generate events. However, the present invention is not limited to three cores, but it can be a plurality of cores. Each core, e.g. 130, 140, or 150, receives each different local clock and includes an event tracing component, e.g., 170, 180, or 190. The event tracing component records events occurring each core in an event trace 120 and records event data, e.g. a shared counter value (the shared counter will be described later.) in event trace 120. Timestamps are recorded in event trace 120 by the event tracing components in the cores for each event, based on the clock that is used at the time at the core where the event occurred. The events generated include, but are not limited to, a library event such as a call to a library function. Anything that affects program behavior / st...

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Abstract

A system and method to synchronize independent local clocks in multi-core processing system are disclosed. A shared counter or a shared memory / file is provided to establish a partial happened-before relationship (e1<e2 in the happened-before order if we know that the event e1 happened before the event e2) and a synchronizer device is utilized to generate a global time of events in threads or processes. The synchronizer device estimates each clock's start time and approximates elapsed time between events in threads or processes by executing an all-pair shortest-path algorithm

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a U.S. continuation application which is filed under 35 U.S.C. 111(a) and claims the benefit under 35 U.S.C. 120 of an allowed U.S. patent application (U.S. patent application Ser. No. 11 / 958,918), filed on Dec. 18, 2007, the entire contents of which are hereby incorporated by reference.BACKGROUND OF INVENTION[0002]1. Field or invention[0003]The present invention relates to a clock synchronization system and method in a multi-core processing system.[0004]2. Description of the Prior Art[0005]A problem arises, when tracing programs that run on a multi-core machine having a plurality of processing cores where clocks on each core are not synchronized. This absence of consistent time across the processes complicates program debugging, performance analysis, and visualization. For example, the problem arises in the following situations:[0006]At runtime, at each point, each process has access to a clock, but not all processes ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F1/12
CPCG06F1/12H04J3/0638G06F1/14
Inventor BIBERSTEIN, MARINAHAREL, YUVALHEILPER, ANDRE
Owner INT BUSINESS MASCH CORP
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